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net/mlx5_core: Use coherent memory for command interface page
Use coherent memory for the commands descriptor page. Take measures to make sure the page is aligned to MLX5_ADAPTER_PAGE_SIZE as required by the hardware. Reported-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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60722c2ba0
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64599cca51
@ -1319,6 +1319,45 @@ ex_err:
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return err;
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}
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static int alloc_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
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{
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struct device *ddev = &dev->pdev->dev;
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cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE,
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&cmd->alloc_dma, GFP_KERNEL);
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if (!cmd->cmd_alloc_buf)
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return -ENOMEM;
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/* make sure it is aligned to 4K */
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if (!((uintptr_t)cmd->cmd_alloc_buf & (MLX5_ADAPTER_PAGE_SIZE - 1))) {
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cmd->cmd_buf = cmd->cmd_alloc_buf;
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cmd->dma = cmd->alloc_dma;
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cmd->alloc_size = MLX5_ADAPTER_PAGE_SIZE;
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return 0;
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}
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dma_free_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE, cmd->cmd_alloc_buf,
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cmd->alloc_dma);
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cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev,
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2 * MLX5_ADAPTER_PAGE_SIZE - 1,
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&cmd->alloc_dma, GFP_KERNEL);
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if (!cmd->cmd_alloc_buf)
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return -ENOMEM;
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cmd->cmd_buf = PTR_ALIGN(cmd->cmd_alloc_buf, MLX5_ADAPTER_PAGE_SIZE);
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cmd->dma = ALIGN(cmd->alloc_dma, MLX5_ADAPTER_PAGE_SIZE);
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cmd->alloc_size = 2 * MLX5_ADAPTER_PAGE_SIZE - 1;
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return 0;
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}
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static void free_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
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{
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struct device *ddev = &dev->pdev->dev;
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dma_free_coherent(ddev, cmd->alloc_size, cmd->cmd_alloc_buf,
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cmd->alloc_dma);
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}
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int mlx5_cmd_init(struct mlx5_core_dev *dev)
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{
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int size = sizeof(struct mlx5_cmd_prot_block);
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@ -1341,17 +1380,9 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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if (!cmd->pool)
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return -ENOMEM;
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cmd->cmd_buf = (void *)__get_free_pages(GFP_ATOMIC, 0);
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if (!cmd->cmd_buf) {
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err = -ENOMEM;
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err = alloc_cmd_page(dev, cmd);
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if (err)
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goto err_free_pool;
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}
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cmd->dma = dma_map_single(&dev->pdev->dev, cmd->cmd_buf, PAGE_SIZE,
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DMA_BIDIRECTIONAL);
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if (dma_mapping_error(&dev->pdev->dev, cmd->dma)) {
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err = -ENOMEM;
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goto err_free;
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}
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cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
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cmd->log_sz = cmd_l >> 4 & 0xf;
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@ -1360,13 +1391,13 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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dev_err(&dev->pdev->dev, "firmware reports too many outstanding commands %d\n",
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1 << cmd->log_sz);
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err = -EINVAL;
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goto err_map;
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goto err_free_page;
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}
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if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
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dev_err(&dev->pdev->dev, "command queue size overflow\n");
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err = -EINVAL;
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goto err_map;
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goto err_free_page;
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}
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cmd->checksum_disabled = 1;
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@ -1378,7 +1409,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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dev_err(&dev->pdev->dev, "driver does not support command interface version. driver %d, firmware %d\n",
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CMD_IF_REV, cmd->cmdif_rev);
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err = -ENOTSUPP;
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goto err_map;
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goto err_free_page;
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}
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spin_lock_init(&cmd->alloc_lock);
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@ -1394,7 +1425,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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if (cmd_l & 0xfff) {
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dev_err(&dev->pdev->dev, "invalid command queue address\n");
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err = -ENOMEM;
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goto err_map;
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goto err_free_page;
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}
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iowrite32be(cmd_h, &dev->iseg->cmdq_addr_h);
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@ -1410,7 +1441,7 @@ int mlx5_cmd_init(struct mlx5_core_dev *dev)
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err = create_msg_cache(dev);
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if (err) {
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dev_err(&dev->pdev->dev, "failed to create command cache\n");
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goto err_map;
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goto err_free_page;
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}
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set_wqname(dev);
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@ -1435,11 +1466,8 @@ err_wq:
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err_cache:
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destroy_msg_cache(dev);
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err_map:
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dma_unmap_single(&dev->pdev->dev, cmd->dma, PAGE_SIZE,
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DMA_BIDIRECTIONAL);
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err_free:
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free_pages((unsigned long)cmd->cmd_buf, 0);
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err_free_page:
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free_cmd_page(dev, cmd);
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err_free_pool:
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pci_pool_destroy(cmd->pool);
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@ -1455,9 +1483,7 @@ void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
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clean_debug_files(dev);
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destroy_workqueue(cmd->wq);
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destroy_msg_cache(dev);
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dma_unmap_single(&dev->pdev->dev, cmd->dma, PAGE_SIZE,
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DMA_BIDIRECTIONAL);
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free_pages((unsigned long)cmd->cmd_buf, 0);
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free_cmd_page(dev, cmd);
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pci_pool_destroy(cmd->pool);
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}
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EXPORT_SYMBOL(mlx5_cmd_cleanup);
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@ -232,6 +232,9 @@ struct mlx5_cmd_stats {
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};
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struct mlx5_cmd {
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void *cmd_alloc_buf;
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dma_addr_t alloc_dma;
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int alloc_size;
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void *cmd_buf;
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dma_addr_t dma;
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u16 cmdif_rev;
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