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Merge branch 'clk-imx' into clk-next
* clk-imx: clk: imx: vf610: add CAAM clock clk: imx8mp: add mu root clk
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commit
63e95849a7
@ -680,6 +680,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
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hws[IMX8MP_CLK_I2C2_ROOT] = imx_clk_hw_gate4("i2c2_root_clk", "i2c2", ccm_base + 0x4180, 0);
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hws[IMX8MP_CLK_I2C3_ROOT] = imx_clk_hw_gate4("i2c3_root_clk", "i2c3", ccm_base + 0x4190, 0);
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hws[IMX8MP_CLK_I2C4_ROOT] = imx_clk_hw_gate4("i2c4_root_clk", "i2c4", ccm_base + 0x41a0, 0);
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hws[IMX8MP_CLK_MU_ROOT] = imx_clk_hw_gate4("mu_root_clk", "ipg_root", ccm_base + 0x4210, 0);
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hws[IMX8MP_CLK_OCOTP_ROOT] = imx_clk_hw_gate4("ocotp_root_clk", "ipg_root", ccm_base + 0x4220, 0);
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hws[IMX8MP_CLK_PCIE_ROOT] = imx_clk_hw_gate4("pcie_root_clk", "pcie_aux", ccm_base + 0x4250, 0);
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hws[IMX8MP_CLK_PWM1_ROOT] = imx_clk_hw_gate4("pwm1_root_clk", "pwm1", ccm_base + 0x4280, 0);
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@ -438,6 +438,7 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
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clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7));
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clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24);
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clk[VF610_CLK_OCOTP] = imx_clk_gate("ocotp", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(5));
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clk[VF610_CLK_CAAM] = imx_clk_gate2("caam", "ipg_bus", CCM_CCGR11, CCM_CCGRx_CGn(0));
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imx_check_clocks(clk, ARRAY_SIZE(clk));
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@ -195,6 +195,7 @@
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#define VF610_CLK_WKPU 186
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#define VF610_CLK_TCON0 187
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#define VF610_CLK_TCON1 188
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#define VF610_CLK_END 189
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#define VF610_CLK_CAAM 189
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#define VF610_CLK_END 190
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#endif /* __DT_BINDINGS_CLOCK_VF610_H */
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