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[media] drx-j: get rid of most of the typedefs

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There are lots of typedefs there. Let's get rid of them.

Most of the work here is due to this small script:

	if [ "$3" == "" ]; then
		echo "usage: $0 type DRXName drx_name"
	fi
	t=$1; f=$2; g=$3
	for i in *.[ch]; do
		sed s,"p${f}_t","$t $g *",g <$i >a && mv a $i && \
		sed s,"${f}_t","$t $g",g <$i >a && mv a $i
	done

Just kept there the function typedefs, as those are still useful.

Yet, all those tuner_ops can likely be just removed on a latter
cleanup patch.

Acked-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Mauro Carvalho Chehab 2012-03-20 01:18:02 -03:00 committed by Mauro Carvalho Chehab
parent 6c1d56c5cb
commit 61263c751b
8 changed files with 902 additions and 932 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/media/dvb-frontends/drx39xyj/drx39xxj.c
View File

@ -34,7 +34,7 @@ static int drx39xxj_set_powerstate(struct dvb_frontend *fe, int enable)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStatus_t result;
int result;
DRXPowerMode_t powerMode;
if (enable)
@ -56,7 +56,7 @@ static int drx39xxj_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStatus_t result;
int result;
DRXLockStatus_t lock_status;
*status = 0;
@ -103,7 +103,7 @@ static int drx39xxj_read_ber(struct dvb_frontend *fe, u32 *ber)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStatus_t result;
int result;
DRXSigQuality_t sig_quality;
result = DRX_Ctrl(demod, DRX_CTRL_SIG_QUALITY, &sig_quality);
@ -122,7 +122,7 @@ static int drx39xxj_read_signal_strength(struct dvb_frontend *fe,
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStatus_t result;
int result;
DRXSigQuality_t sig_quality;
result = DRX_Ctrl(demod, DRX_CTRL_SIG_QUALITY, &sig_quality);
@ -141,7 +141,7 @@ static int drx39xxj_read_snr(struct dvb_frontend *fe, u16 *snr)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStatus_t result;
int result;
DRXSigQuality_t sig_quality;
result = DRX_Ctrl(demod, DRX_CTRL_SIG_QUALITY, &sig_quality);
@ -159,7 +159,7 @@ static int drx39xxj_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStatus_t result;
int result;
DRXSigQuality_t sig_quality;
result = DRX_Ctrl(demod, DRX_CTRL_SIG_QUALITY, &sig_quality);
@ -181,9 +181,9 @@ static int drx39xxj_set_frontend(struct dvb_frontend *fe)
struct dtv_frontend_properties *p = &fe->dtv_property_cache;
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
DRXStandard_t standard = DRX_STANDARD_8VSB;
enum drx_standard standard = DRX_STANDARD_8VSB;
DRXChannel_t channel;
DRXStatus_t result;
int result;
DRXUIOData_t uioData;
DRXChannel_t defChannel = { /* frequency */ 0,
/* bandwidth */ DRX_BANDWIDTH_6MHZ,
@ -270,7 +270,7 @@ static int drx39xxj_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
bool i2c_gate_state;
DRXStatus_t result;
int result;
#ifdef DJH_DEBUG
printk(KERN_DBG "i2c gate call: enable=%d state=%d\n", enable,
@ -331,7 +331,7 @@ struct dvb_frontend *drx39xxj_attach(struct i2c_adapter *i2c)
DRXDemodInstance_t *demod = NULL;
DRXUIOCfg_t uioCfg;
DRXUIOData_t uioData;
DRXStatus_t result;
int result;
/* allocate memory for the internal state */
state = kmalloc(sizeof(struct drx39xxj_state), GFP_KERNEL);

2
drivers/media/dvb-frontends/drx39xyj/drx39xxj.h
View File

@ -29,7 +29,7 @@
struct drx39xxj_state {
struct i2c_adapter *i2c;
DRXDemodInstance_t *demod;
DRXStandard_t current_standard;
enum drx_standard current_standard;
struct dvb_frontend frontend;
int powered_up:1;
unsigned int i2c_gate_open:1;

18
drivers/media/dvb-frontends/drx39xyj/drx39xxj_dummy.c
View File

@ -11,33 +11,33 @@
#include "drx39xxj.h"
/* Dummy function to satisfy drxj.c */
DRXStatus_t DRXBSP_TUNER_Open(pTUNERInstance_t tuner)
int DRXBSP_TUNER_Open(struct tuner_instance *tuner)
{
return DRX_STS_OK;
}
DRXStatus_t DRXBSP_TUNER_Close(pTUNERInstance_t tuner)
int DRXBSP_TUNER_Close(struct tuner_instance *tuner)
{
return DRX_STS_OK;
}
DRXStatus_t DRXBSP_TUNER_SetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
int DRXBSP_TUNER_SetFrequency(struct tuner_instance *tuner,
u32 mode,
s32 centerFrequency)
{
return DRX_STS_OK;
}
DRXStatus_t
DRXBSP_TUNER_GetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
int
DRXBSP_TUNER_GetFrequency(struct tuner_instance *tuner,
u32 mode,
s32 *RFfrequency,
s32 *IFfrequency)
{
return DRX_STS_OK;
}
DRXStatus_t DRXBSP_HST_Sleep(u32 n)
int DRXBSP_HST_Sleep(u32 n)
{
msleep(n);
return DRX_STS_OK;
@ -58,7 +58,7 @@ void *DRXBSP_HST_Memcpy(void *to, void *from, u32 n)
return (memcpy(to, from, (size_t) n));
}
DRXStatus_t DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
int DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
u16 wCount,
u8 *wData,
struct i2c_device_addr *rDevAddr,

70
drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.c
View File

@ -55,61 +55,61 @@
/*============================================================================*/
/* Function prototypes */
static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16 datasize, /* size of data */
u8 *data, /* data to send */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16 datasize, /* size of data */
u8 *data, /* data to send */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8 data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8 *data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u8 datain, /* data to send */
u8 *dataout); /* data to receive back */
static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u16 data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u16 *data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u16 datain, /* data to send */
u16 *dataout); /* data to receive back */
static DRXStatus_t DRXDAP_FASI_WriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_WriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u32 data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u32 *data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u32 datain, /* data to send */
@ -149,7 +149,7 @@ DRXAccessFunc_t drxDapFASIFunct_g = {
/* Functions not supported by protocol*/
static DRXStatus_t DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8 data, /* data to write */
DRXflags_t flags)
@ -157,7 +157,7 @@ static DRXStatus_t DRXDAP_FASI_WriteReg8(struct i2c_device_addr *devAddr, /* add
return DRX_STS_ERROR;
}
static DRXStatus_t DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8 *data, /* buffer to receive data */
DRXflags_t flags)
@ -165,7 +165,7 @@ static DRXStatus_t DRXDAP_FASI_ReadReg8(struct i2c_device_addr *devAddr, /* addr
return DRX_STS_ERROR;
}
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u8 datain, /* data to send */
@ -174,7 +174,7 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(struct i2c_device_addr *devAd
return DRX_STS_ERROR;
}
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
static int DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u32 datain, /* data to send */
@ -187,7 +187,7 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devA
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadBlock (
* int DRXDAP_FASI_ReadBlock (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16 datasize, -- number of bytes to read
@ -210,14 +210,14 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(struct i2c_device_addr *devA
*
******************************/
static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16 datasize,
u8 *data, DRXflags_t flags)
{
u8 buf[4];
u16 bufx;
DRXStatus_t rc;
int rc;
u16 overheadSize = 0;
/* Check parameters ******************************************************* */
@ -302,7 +302,7 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16 (
* int DRXDAP_FASI_ReadModifyWriteReg16 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t waddr, -- address of chip register/memory
* DRXaddr_t raddr, -- chip address to read back from
@ -325,12 +325,12 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock(struct i2c_device_addr *devAddr,
*
******************************/
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devAddr,
DRXaddr_t waddr,
DRXaddr_t raddr,
u16 wdata, u16 *rdata)
{
DRXStatus_t rc = DRX_STS_ERROR;
int rc = DRX_STS_ERROR;
#if ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 )
if (rdata == NULL) {
@ -348,7 +348,7 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devA
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadReg16 (
* int DRXDAP_FASI_ReadReg16 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16 *data, -- data to receive
@ -364,12 +364,12 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(struct i2c_device_addr *devA
*
******************************/
static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16 *data, DRXflags_t flags)
{
u8 buf[sizeof(*data)];
DRXStatus_t rc;
int rc;
if (!data) {
return DRX_STS_INVALID_ARG;
@ -381,7 +381,7 @@ static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadReg32 (
* int DRXDAP_FASI_ReadReg32 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u32 *data, -- data to receive
@ -397,12 +397,12 @@ static DRXStatus_t DRXDAP_FASI_ReadReg16(struct i2c_device_addr *devAddr,
*
******************************/
static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u32 *data, DRXflags_t flags)
{
u8 buf[sizeof(*data)];
DRXStatus_t rc;
int rc;
if (!data) {
return DRX_STS_INVALID_ARG;
@ -416,7 +416,7 @@ static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
/******************************
*
* DRXStatus_t DRXDAP_FASI_WriteBlock (
* int DRXDAP_FASI_WriteBlock (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16 datasize, -- number of bytes to read
@ -436,14 +436,14 @@ static DRXStatus_t DRXDAP_FASI_ReadReg32(struct i2c_device_addr *devAddr,
*
******************************/
static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16 datasize,
u8 *data, DRXflags_t flags)
{
u8 buf[DRXDAP_MAX_WCHUNKSIZE];
DRXStatus_t st = DRX_STS_ERROR;
DRXStatus_t firstErr = DRX_STS_OK;
int st = DRX_STS_ERROR;
int firstErr = DRX_STS_OK;
u16 overheadSize = 0;
u16 blockSize = 0;
@ -560,7 +560,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
/******************************
*
* DRXStatus_t DRXDAP_FASI_WriteReg16 (
* int DRXDAP_FASI_WriteReg16 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u16 data, -- data to send
@ -575,7 +575,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock(struct i2c_device_addr *devAddr,
*
******************************/
static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u16 data, DRXflags_t flags)
{
@ -589,7 +589,7 @@ static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
/******************************
*
* DRXStatus_t DRXDAP_FASI_WriteReg32 (
* int DRXDAP_FASI_WriteReg32 (
* struct i2c_device_addr *devAddr, -- address of I2C device
* DRXaddr_t addr, -- address of chip register/memory
* u32 data, -- data to send
@ -604,7 +604,7 @@ static DRXStatus_t DRXDAP_FASI_WriteReg16(struct i2c_device_addr *devAddr,
*
******************************/
static DRXStatus_t DRXDAP_FASI_WriteReg32(struct i2c_device_addr *devAddr,
static int DRXDAP_FASI_WriteReg32(struct i2c_device_addr *devAddr,
DRXaddr_t addr,
u32 data, DRXflags_t flags)
{

96
drivers/media/dvb-frontends/drx39xyj/drx_driver.c
View File

@ -145,7 +145,7 @@ FUNCTIONS
#ifndef DRX_EXCLUDE_SCAN
/* Prototype of default scanning function */
static DRXStatus_t
static int
ScanFunctionDefault(void *scanContext,
DRXScanCommand_t scanCommand,
pDRXChannel_t scanChannel, bool * getNextChannel);
@ -197,7 +197,7 @@ void *GetScanContext(pDRXDemodInstance_t demod, void *scanContext)
* \brief Wait for lock while scanning.
* \param demod: Pointer to demodulator instance.
* \param lockStat: Pointer to bool indicating if end result is lock or not.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Success
* \retval DRX_STS_ERROR: I2C failure or bsp function failure.
*
@ -211,7 +211,7 @@ void *GetScanContext(pDRXDemodInstance_t demod, void *scanContext)
* In case DRX_NEVER_LOCK is returned the poll-wait will be aborted.
*
*/
static DRXStatus_t ScanWaitForLock(pDRXDemodInstance_t demod, bool * isLocked)
static int ScanWaitForLock(pDRXDemodInstance_t demod, bool * isLocked)
{
bool doneWaiting = false;
DRXLockStatus_t lockState = DRX_NOT_LOCKED;
@ -263,7 +263,7 @@ static DRXStatus_t ScanWaitForLock(pDRXDemodInstance_t demod, bool * isLocked)
* \brief Determine next frequency to scan.
* \param demod: Pointer to demodulator instance.
* \param skip : Minimum frequency step to take.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Succes.
* \retval DRX_STS_INVALID_ARG: Invalid frequency plan.
*
@ -272,7 +272,7 @@ static DRXStatus_t ScanWaitForLock(pDRXDemodInstance_t demod, bool * isLocked)
* Check if scan is ready.
*
*/
static DRXStatus_t
static int
ScanPrepareNextScan(pDRXDemodInstance_t demod, s32 skip)
{
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
@ -345,7 +345,7 @@ ScanPrepareNextScan(pDRXDemodInstance_t demod, s32 skip)
* \param scanChannel: Channel to check: frequency and bandwidth, others AUTO
* \param getNextChannel: Return true if next frequency is desired at next call
*
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Channel found, DRX_CTRL_GET_CHANNEL can be used
* to retrieve channel parameters.
* \retval DRX_STS_BUSY: Channel not found (yet).
@ -353,13 +353,13 @@ ScanPrepareNextScan(pDRXDemodInstance_t demod, s32 skip)
*
* scanChannel and getNextChannel will be NULL for INIT and STOP.
*/
static DRXStatus_t
static int
ScanFunctionDefault(void *scanContext,
DRXScanCommand_t scanCommand,
pDRXChannel_t scanChannel, bool * getNextChannel)
{
pDRXDemodInstance_t demod = NULL;
DRXStatus_t status = DRX_STS_ERROR;
int status = DRX_STS_ERROR;
bool isLocked = false;
demod = (pDRXDemodInstance_t) scanContext;
@ -398,7 +398,7 @@ ScanFunctionDefault(void *scanContext,
* \brief Initialize for channel scan.
* \param demod: Pointer to demodulator instance.
* \param scanParam: Pointer to scan parameters.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Initialized for scan.
* \retval DRX_STS_ERROR: No overlap between frequency plan and tuner
* range.
@ -411,10 +411,10 @@ ScanFunctionDefault(void *scanContext,
* center frequency of the frequency plan that is within the tuner range.
*
*/
static DRXStatus_t
static int
CtrlScanInit(pDRXDemodInstance_t demod, pDRXScanParam_t scanParam)
{
DRXStatus_t status = DRX_STS_ERROR;
int status = DRX_STS_ERROR;
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
s32 maxTunerFreq = 0;
s32 minTunerFreq = 0;
@ -546,14 +546,14 @@ CtrlScanInit(pDRXDemodInstance_t demod, pDRXScanParam_t scanParam)
/**
* \brief Stop scanning.
* \param demod: Pointer to demodulator instance.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Scan stopped.
* \retval DRX_STS_ERROR: Something went wrong.
* \retval DRX_STS_INVALID_ARG: Wrong parameters.
*/
static DRXStatus_t CtrlScanStop(pDRXDemodInstance_t demod)
static int CtrlScanStop(pDRXDemodInstance_t demod)
{
DRXStatus_t status = DRX_STS_ERROR;
int status = DRX_STS_ERROR;
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
void *scanContext = NULL;
@ -587,7 +587,7 @@ static DRXStatus_t CtrlScanStop(pDRXDemodInstance_t demod)
* \brief Scan for next channel.
* \param demod: Pointer to demodulator instance.
* \param scanProgress: Pointer to scan progress.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Channel found, DRX_CTRL_GET_CHANNEL can be used
* to retrieve channel parameters.
* \retval DRX_STS_BUSY: Tried part of the channels, as specified in
@ -601,7 +601,7 @@ static DRXStatus_t CtrlScanStop(pDRXDemodInstance_t demod)
* Progress indication will run from 0 upto DRX_SCAN_MAX_PROGRESS during scan.
*
*/
static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
static int CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
{
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
bool * scanReady = (bool *) (NULL);
@ -636,7 +636,7 @@ static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
for (i = 0; ((i < numTries) && ((*scanReady) == false)); i++) {
DRXChannel_t scanChannel = { 0 };
DRXStatus_t status = DRX_STS_ERROR;
int status = DRX_STS_ERROR;
pDRXFrequencyPlan_t freqPlan = (pDRXFrequencyPlan_t) (NULL);
bool nextChannel = false;
void *scanContext = NULL;
@ -671,7 +671,7 @@ static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
/* Proceed to next channel if requested */
if (nextChannel == true) {
DRXStatus_t nextStatus = DRX_STS_ERROR;
int nextStatus = DRX_STS_ERROR;
s32 skip = 0;
if (status == DRX_STS_OK) {
@ -718,7 +718,7 @@ static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
* \brief Program tuner.
* \param demod: Pointer to demodulator instance.
* \param tunerChannel: Pointer to tuning parameters.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Tuner programmed successfully.
* \retval DRX_STS_ERROR: Something went wrong.
* \retval DRX_STS_INVALID_ARG: Wrong parameters.
@ -727,13 +727,13 @@ static DRXStatus_t CtrlScanNext(pDRXDemodInstance_t demod, u16 *scanProgress)
* but also returns the actual RF and IF frequency from the tuner.
*
*/
static DRXStatus_t
static int
CtrlProgramTuner(pDRXDemodInstance_t demod, pDRXChannel_t channel)
{
pDRXCommonAttr_t commonAttr = (pDRXCommonAttr_t) (NULL);
DRXStandard_t standard = DRX_STANDARD_UNKNOWN;
TUNERMode_t tunerMode = 0;
DRXStatus_t status = DRX_STS_ERROR;
enum drx_standard standard = DRX_STANDARD_UNKNOWN;
u32 tunerMode = 0;
int status = DRX_STS_ERROR;
s32 ifFrequency = 0;
bool tunerSlowMode = false;
@ -782,7 +782,7 @@ CtrlProgramTuner(pDRXDemodInstance_t demod, pDRXChannel_t channel)
if (commonAttr->tunerPortNr == 1) {
bool bridgeClosed = true;
DRXStatus_t statusBridge = DRX_STS_ERROR;
int statusBridge = DRX_STS_ERROR;
statusBridge =
DRX_Ctrl(demod, DRX_CTRL_I2C_BRIDGE, &bridgeClosed);
@ -797,7 +797,7 @@ CtrlProgramTuner(pDRXDemodInstance_t demod, pDRXChannel_t channel)
/* attempt restoring bridge before checking status of SetFrequency */
if (commonAttr->tunerPortNr == 1) {
bool bridgeClosed = false;
DRXStatus_t statusBridge = DRX_STS_ERROR;
int statusBridge = DRX_STS_ERROR;
statusBridge =
DRX_Ctrl(demod, DRX_CTRL_I2C_BRIDGE, &bridgeClosed);
@ -833,13 +833,13 @@ CtrlProgramTuner(pDRXDemodInstance_t demod, pDRXChannel_t channel)
* \brief function to do a register dump.
* \param demod: Pointer to demodulator instance.
* \param registers: Registers to dump.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Dump executed successfully.
* \retval DRX_STS_ERROR: Something went wrong.
* \retval DRX_STS_INVALID_ARG: Wrong parameters.
*
*/
DRXStatus_t CtrlDumpRegisters(pDRXDemodInstance_t demod,
int CtrlDumpRegisters(pDRXDemodInstance_t demod,
pDRXRegDump_t registers)
{
u16 i = 0;
@ -851,7 +851,7 @@ DRXStatus_t CtrlDumpRegisters(pDRXDemodInstance_t demod,
/* start dumping registers */
while (registers[i].address != 0) {
DRXStatus_t status = DRX_STS_ERROR;
int status = DRX_STS_ERROR;
u16 value = 0;
u32 data = 0;
@ -968,7 +968,7 @@ static u16 UCodeComputeCRC(u8 *blockData, u16 nrWords)
* \param devAddr: Address of device.
* \param mcInfo: Pointer to information about microcode data.
* \param action: Either UCODE_UPLOAD or UCODE_VERIFY
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK:
* - In case of UCODE_UPLOAD: code is successfully uploaded.
* - In case of UCODE_VERIFY: image on device is equal to
@ -981,11 +981,11 @@ static u16 UCodeComputeCRC(u8 *blockData, u16 nrWords)
* - Invalid arguments.
* - Provided image is corrupt
*/
static DRXStatus_t
static int
CtrlUCode(pDRXDemodInstance_t demod,
pDRXUCodeInfo_t mcInfo, DRXUCodeAction_t action)
{
DRXStatus_t rc;
int rc;
u16 i = 0;
u16 mcNrOfBlks = 0;
u16 mcMagicWord = 0;
@ -1197,11 +1197,11 @@ CtrlUCode(pDRXDemodInstance_t demod,
* \brief Build list of version information.
* \param demod: A pointer to a demodulator instance.
* \param versionList: Pointer to linked list of versions.
* \return DRXStatus_t.
* \return int.
* \retval DRX_STS_OK: Version information stored in versionList
* \retval DRX_STS_INVALID_ARG: Invalid arguments.
*/
static DRXStatus_t
static int
CtrlVersion(pDRXDemodInstance_t demod, pDRXVersionList_t * versionList)
{
static char drxDriverCoreModuleName[] = "Core driver";
@ -1212,7 +1212,7 @@ CtrlVersion(pDRXDemodInstance_t demod, pDRXVersionList_t * versionList)
static DRXVersionList_t drxDriverCoreVersionList;
pDRXVersionList_t demodVersionList = (pDRXVersionList_t) (NULL);
DRXStatus_t returnStatus = DRX_STS_ERROR;
int returnStatus = DRX_STS_ERROR;
/* Check arguments */
if (versionList == NULL) {
@ -1264,14 +1264,14 @@ CtrlVersion(pDRXDemodInstance_t demod, pDRXVersionList_t * versionList)
/**
* \brief This function is obsolete.
* \param demods: Don't care, parameter is ignored.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK: Initialization completed.
*
* This function is obsolete, prototype available for backward compatability.
*
*/
DRXStatus_t DRX_Init(pDRXDemodInstance_t demods[])
int DRX_Init(pDRXDemodInstance_t demods[])
{
return DRX_STS_OK;
}
@ -1280,14 +1280,14 @@ DRXStatus_t DRX_Init(pDRXDemodInstance_t demods[])
/**
* \brief This function is obsolete.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK: Terminated driver successful.
*
* This function is obsolete, prototype available for backward compatability.
*
*/
DRXStatus_t DRX_Term(void)
int DRX_Term(void)
{
return DRX_STS_OK;
}
@ -1297,7 +1297,7 @@ DRXStatus_t DRX_Term(void)
/**
* \brief Open a demodulator instance.
* \param demod: A pointer to a demodulator instance.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK: Opened demod instance with succes.
* \retval DRX_STS_ERROR: Driver not initialized or unable to initialize
* demod.
@ -1305,9 +1305,9 @@ DRXStatus_t DRX_Term(void)
*
*/
DRXStatus_t DRX_Open(pDRXDemodInstance_t demod)
int DRX_Open(pDRXDemodInstance_t demod)
{
DRXStatus_t status = DRX_STS_OK;
int status = DRX_STS_OK;
if ((demod == NULL) ||
(demod->myDemodFunct == NULL) ||
@ -1332,7 +1332,7 @@ DRXStatus_t DRX_Open(pDRXDemodInstance_t demod)
/**
* \brief Close device.
* \param demod: A pointer to a demodulator instance.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK: Closed demod instance with succes.
* \retval DRX_STS_ERROR: Driver not initialized or error during close
* demod.
@ -1342,9 +1342,9 @@ DRXStatus_t DRX_Open(pDRXDemodInstance_t demod)
* Put device into sleep mode.
*/
DRXStatus_t DRX_Close(pDRXDemodInstance_t demod)
int DRX_Close(pDRXDemodInstance_t demod)
{
DRXStatus_t status = DRX_STS_OK;
int status = DRX_STS_OK;
if ((demod == NULL) ||
(demod->myDemodFunct == NULL) ||
@ -1369,7 +1369,7 @@ DRXStatus_t DRX_Close(pDRXDemodInstance_t demod)
* \param demod: A pointer to a demodulator instance.
* \param ctrl: Reference to desired control function.
* \param ctrlData: Pointer to data structure for control function.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK: Control function completed successfully.
* \retval DRX_STS_ERROR: Driver not initialized or error during
* control demod.
@ -1382,10 +1382,10 @@ DRXStatus_t DRX_Close(pDRXDemodInstance_t demod)
*
*/
DRXStatus_t
DRX_Ctrl(pDRXDemodInstance_t demod, DRXCtrlIndex_t ctrl, void *ctrlData)
int
DRX_Ctrl(pDRXDemodInstance_t demod, u32 ctrl, void *ctrlData)
{
DRXStatus_t status = DRX_STS_ERROR;
int status = DRX_STS_ERROR;
if ((demod == NULL) ||
(demod->myDemodFunct == NULL) ||

632
drivers/media/dvb-frontends/drx39xyj/drx_driver.h
View File

@ -42,7 +42,7 @@
INCLUDES
-------------------------------------------------------------------------*/
typedef enum {
enum DRXStatus {
DRX_STS_READY = 3, /**< device/service is ready */
DRX_STS_BUSY = 2, /**< device/service is busy */
DRX_STS_OK = 1, /**< everything is OK */
@ -51,7 +51,7 @@ typedef enum {
DRX_STS_ERROR = -2, /**< general error */
DRX_STS_FUNC_NOT_AVAILABLE = -3
/**< unavailable functionality */
} DRXStatus_t, *pDRXStatus_t;
};
/*
* This structure contains the I2C address, the device ID and a userData pointer.
@ -81,23 +81,23 @@ Exported FUNCTIONS
/**
* \fn DRXBSP_I2C_Init()
* \brief Initialize I2C communication module.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK Initialization successful.
* \retval DRX_STS_ERROR Initialization failed.
*/
DRXStatus_t DRXBSP_I2C_Init(void);
int DRXBSP_I2C_Init(void);
/**
* \fn DRXBSP_I2C_Term()
* \brief Terminate I2C communication module.
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK Termination successful.
* \retval DRX_STS_ERROR Termination failed.
*/
DRXStatus_t DRXBSP_I2C_Term(void);
int DRXBSP_I2C_Term(void);
/**
* \fn DRXStatus_t DRXBSP_I2C_WriteRead( struct i2c_device_addr *wDevAddr,
* \fn int DRXBSP_I2C_WriteRead( struct i2c_device_addr *wDevAddr,
* u16 wCount,
* u8 * wData,
* struct i2c_device_addr *rDevAddr,
@ -110,7 +110,7 @@ DRXStatus_t DRXBSP_I2C_Term(void);
* \param rDevAddr The device i2c address and the device ID to read from
* \param rCount The number of bytes to read
* \param rData The array to read the data from
* \return DRXStatus_t Return status.
* \return int Return status.
* \retval DRX_STS_OK Succes.
* \retval DRX_STS_ERROR Failure.
* \retval DRX_STS_INVALID_ARG Parameter 'wcount' is not zero but parameter
@ -126,7 +126,7 @@ DRXStatus_t DRXBSP_I2C_Term(void);
* The device ID can be useful if several devices share an I2C address.
* It can be used to control a "switch" on the I2C bus to the correct device.
*/
DRXStatus_t DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
int DRXBSP_I2C_WriteRead(struct i2c_device_addr *wDevAddr,
u16 wCount,
u8 * wData,
struct i2c_device_addr *rDevAddr,
@ -170,26 +170,19 @@ extern int DRX_I2C_Error_g;
TUNER_MODE_SUB4 | TUNER_MODE_SUB5 | \
TUNER_MODE_SUB6 | TUNER_MODE_SUB7 )
typedef u32 TUNERMode_t;
typedef u32 * pTUNERMode_t;
typedef char *TUNERSubMode_t; /* description of submode */
typedef TUNERSubMode_t *pTUNERSubMode_t;
typedef enum {
enum tuner_lock_status {
TUNER_LOCKED,
TUNER_NOT_LOCKED
} TUNERLockStatus_t, *pTUNERLockStatus_t;
typedef struct {
};
struct tuner_common {
char *name; /* Tuner brand & type name */
s32 minFreqRF; /* Lowest RF input frequency, in kHz */
s32 maxFreqRF; /* Highest RF input frequency, in kHz */
u8 subMode; /* Index to sub-mode in use */
pTUNERSubMode_t subModeDescriptions; /* Pointer to description of sub-modes */
char *** subModeDescriptions; /* Pointer to description of sub-modes */
u8 subModes; /* Number of available sub-modes */
/* The following fields will be either 0, NULL or false and do not need
@ -201,31 +194,30 @@ typedef struct {
void *myUserData; /* pointer to associated demod instance */
u16 myCapabilities; /* value for storing application flags */
};
} TUNERCommonAttr_t, *pTUNERCommonAttr_t;
struct tuner_instance;
typedef struct TUNERInstance_s *pTUNERInstance_t;
typedef int(*TUNEROpenFunc_t) (struct tuner_instance *tuner);
typedef int(*TUNERCloseFunc_t) (struct tuner_instance *tuner);
typedef DRXStatus_t(*TUNEROpenFunc_t) (pTUNERInstance_t tuner);
typedef DRXStatus_t(*TUNERCloseFunc_t) (pTUNERInstance_t tuner);
typedef DRXStatus_t(*TUNERSetFrequencyFunc_t) (pTUNERInstance_t tuner,
TUNERMode_t mode,
typedef int(*TUNERSetFrequencyFunc_t) (struct tuner_instance *tuner,
u32 mode,
s32
frequency);
typedef DRXStatus_t(*TUNERGetFrequencyFunc_t) (pTUNERInstance_t tuner,
TUNERMode_t mode,
typedef int(*TUNERGetFrequencyFunc_t) (struct tuner_instance *tuner,
u32 mode,
s32 *
RFfrequency,
s32 *
IFfrequency);
typedef DRXStatus_t(*TUNERLockStatusFunc_t) (pTUNERInstance_t tuner,
pTUNERLockStatus_t
typedef int(*TUNERLockStatusFunc_t) (struct tuner_instance *tuner,
enum tuner_lock_status *
lockStat);
typedef DRXStatus_t(*TUNERi2cWriteReadFunc_t) (pTUNERInstance_t tuner,
typedef int(*TUNERi2cWriteReadFunc_t) (struct tuner_instance *tuner,
struct i2c_device_addr *
wDevAddr, u16 wCount,
u8 * wData,
@ -233,7 +225,7 @@ typedef DRXStatus_t(*TUNERi2cWriteReadFunc_t) (pTUNERInstance_t tuner,
rDevAddr, u16 rCount,
u8 * rData);
typedef struct {
struct tuner_ops {
TUNEROpenFunc_t openFunc;
TUNERCloseFunc_t closeFunc;
TUNERSetFrequencyFunc_t setFrequencyFunc;
@ -241,43 +233,42 @@ typedef struct {
TUNERLockStatusFunc_t lockStatusFunc;
TUNERi2cWriteReadFunc_t i2cWriteReadFunc;
} TUNERFunc_t, *pTUNERFunc_t;
typedef struct TUNERInstance_s {
};
struct tuner_instance {
struct i2c_device_addr myI2CDevAddr;
pTUNERCommonAttr_t myCommonAttr;
struct tuner_common * myCommonAttr;
void *myExtAttr;
pTUNERFunc_t myFunct;
struct tuner_ops * myFunct;
};
} TUNERInstance_t;
DRXStatus_t DRXBSP_TUNER_Open(pTUNERInstance_t tuner);
int DRXBSP_TUNER_Open(struct tuner_instance *tuner);
DRXStatus_t DRXBSP_TUNER_Close(pTUNERInstance_t tuner);
int DRXBSP_TUNER_Close(struct tuner_instance *tuner);
DRXStatus_t DRXBSP_TUNER_SetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
int DRXBSP_TUNER_SetFrequency(struct tuner_instance *tuner,
u32 mode,
s32 frequency);
DRXStatus_t DRXBSP_TUNER_GetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
int DRXBSP_TUNER_GetFrequency(struct tuner_instance *tuner,
u32 mode,
s32 * RFfrequency,
s32 * IFfrequency);
DRXStatus_t DRXBSP_TUNER_LockStatus(pTUNERInstance_t tuner,
pTUNERLockStatus_t lockStat);
int DRXBSP_TUNER_LockStatus(struct tuner_instance *tuner,
enum tuner_lock_status * lockStat);
DRXStatus_t DRXBSP_TUNER_DefaultI2CWriteRead(pTUNERInstance_t tuner,
int DRXBSP_TUNER_DefaultI2CWriteRead(struct tuner_instance *tuner,
struct i2c_device_addr *wDevAddr,
u16 wCount,
u8 * wData,
struct i2c_device_addr *rDevAddr,
u16 rCount, u8 * rData);
DRXStatus_t DRXBSP_HST_Init(void);
int DRXBSP_HST_Init(void);
DRXStatus_t DRXBSP_HST_Term(void);
int DRXBSP_HST_Term(void);
void *DRXBSP_HST_Memcpy(void *to, void *from, u32 n);
@ -285,19 +276,9 @@ int DRXBSP_HST_Memcmp(void *s1, void *s2, u32 n);
u32 DRXBSP_HST_Clock(void);
DRXStatus_t DRXBSP_HST_Sleep(u32 n);
int DRXBSP_HST_Sleep(u32 n);
#ifdef __cplusplus
extern "C" {
#endif
/*-------------------------------------------------------------------------
TYPEDEFS
-------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------
DEFINES
-------------------------------------------------------------------------*/
/**************
*
@ -535,132 +516,132 @@ ENUM
-------------------------------------------------------------------------*/
/**
* \enum DRXStandard_t
* \enum enum drx_standard
* \brief Modulation standards.
*/
typedef enum {
DRX_STANDARD_DVBT = 0, /**< Terrestrial DVB-T. */
DRX_STANDARD_8VSB, /**< Terrestrial 8VSB. */
DRX_STANDARD_NTSC, /**< Terrestrial\Cable analog NTSC. */
DRX_STANDARD_PAL_SECAM_BG,
/**< Terrestrial analog PAL/SECAM B/G */
DRX_STANDARD_PAL_SECAM_DK,
/**< Terrestrial analog PAL/SECAM D/K */
DRX_STANDARD_PAL_SECAM_I,
/**< Terrestrial analog PAL/SECAM I */
DRX_STANDARD_PAL_SECAM_L,
/**< Terrestrial analog PAL/SECAM L
with negative modulation */
DRX_STANDARD_PAL_SECAM_LP,
/**< Terrestrial analog PAL/SECAM L
with positive modulation */
DRX_STANDARD_ITU_A, /**< Cable ITU ANNEX A. */
DRX_STANDARD_ITU_B, /**< Cable ITU ANNEX B. */
DRX_STANDARD_ITU_C, /**< Cable ITU ANNEX C. */
DRX_STANDARD_ITU_D, /**< Cable ITU ANNEX D. */
DRX_STANDARD_FM, /**< Terrestrial\Cable FM radio */
DRX_STANDARD_DTMB, /**< Terrestrial DTMB standard (China)*/
DRX_STANDARD_UNKNOWN = DRX_UNKNOWN,
/**< Standard unknown. */
DRX_STANDARD_AUTO = DRX_AUTO
/**< Autodetect standard. */
} DRXStandard_t, *pDRXStandard_t;
enum drx_standard {
DRX_STANDARD_DVBT = 0, /**< Terrestrial DVB-T. */
DRX_STANDARD_8VSB, /**< Terrestrial 8VSB. */
DRX_STANDARD_NTSC, /**< Terrestrial\Cable analog NTSC. */
DRX_STANDARD_PAL_SECAM_BG,
/**< Terrestrial analog PAL/SECAM B/G */
DRX_STANDARD_PAL_SECAM_DK,
/**< Terrestrial analog PAL/SECAM D/K */
DRX_STANDARD_PAL_SECAM_I,
/**< Terrestrial analog PAL/SECAM I */
DRX_STANDARD_PAL_SECAM_L,
/**< Terrestrial analog PAL/SECAM L
with negative modulation */
DRX_STANDARD_PAL_SECAM_LP,
/**< Terrestrial analog PAL/SECAM L
with positive modulation */
DRX_STANDARD_ITU_A, /**< Cable ITU ANNEX A. */
DRX_STANDARD_ITU_B, /**< Cable ITU ANNEX B. */
DRX_STANDARD_ITU_C, /**< Cable ITU ANNEX C. */
DRX_STANDARD_ITU_D, /**< Cable ITU ANNEX D. */
DRX_STANDARD_FM, /**< Terrestrial\Cable FM radio */
DRX_STANDARD_DTMB, /**< Terrestrial DTMB standard (China)*/
DRX_STANDARD_UNKNOWN = DRX_UNKNOWN,
/**< Standard unknown. */
DRX_STANDARD_AUTO = DRX_AUTO
/**< Autodetect standard. */
};
/**
* \enum DRXStandard_t
* \enum enum drx_standard
* \brief Modulation sub-standards.
*/
typedef enum {
DRX_SUBSTANDARD_MAIN = 0, /**< Main subvariant of standard */
DRX_SUBSTANDARD_ATV_BG_SCANDINAVIA,
DRX_SUBSTANDARD_ATV_DK_POLAND,
DRX_SUBSTANDARD_ATV_DK_CHINA,
DRX_SUBSTANDARD_UNKNOWN = DRX_UNKNOWN,
/**< Sub-standard unknown. */
DRX_SUBSTANDARD_AUTO = DRX_AUTO
/**< Auto (default) sub-standard */
} DRXSubstandard_t, *pDRXSubstandard_t;
enum drx_substandard {
DRX_SUBSTANDARD_MAIN = 0, /**< Main subvariant of standard */
DRX_SUBSTANDARD_ATV_BG_SCANDINAVIA,
DRX_SUBSTANDARD_ATV_DK_POLAND,
DRX_SUBSTANDARD_ATV_DK_CHINA,
DRX_SUBSTANDARD_UNKNOWN = DRX_UNKNOWN,
/**< Sub-standard unknown. */
DRX_SUBSTANDARD_AUTO = DRX_AUTO
/**< Auto (default) sub-standard */
};
/**
* \enum DRXBandwidth_t
* \enum enum drx_bandwidth
* \brief Channel bandwidth or channel spacing.
*/
typedef enum {
DRX_BANDWIDTH_8MHZ = 0, /**< Bandwidth 8 MHz. */
DRX_BANDWIDTH_7MHZ, /**< Bandwidth 7 MHz. */
DRX_BANDWIDTH_6MHZ, /**< Bandwidth 6 MHz. */
DRX_BANDWIDTH_UNKNOWN = DRX_UNKNOWN,
/**< Bandwidth unknown. */
DRX_BANDWIDTH_AUTO = DRX_AUTO
/**< Auto Set Bandwidth */
} DRXBandwidth_t, *pDRXBandwidth_t;
enum drx_bandwidth {
DRX_BANDWIDTH_8MHZ = 0, /**< Bandwidth 8 MHz. */
DRX_BANDWIDTH_7MHZ, /**< Bandwidth 7 MHz. */
DRX_BANDWIDTH_6MHZ, /**< Bandwidth 6 MHz. */
DRX_BANDWIDTH_UNKNOWN = DRX_UNKNOWN,
/**< Bandwidth unknown. */
DRX_BANDWIDTH_AUTO = DRX_AUTO
/**< Auto Set Bandwidth */
};
/**
* \enum DRXMirror_t
* \enum enum drx_mirror
* \brief Indicate if channel spectrum is mirrored or not.
*/
typedef enum {
DRX_MIRROR_NO = 0, /**< Spectrum is not mirrored. */
DRX_MIRROR_YES, /**< Spectrum is mirrored. */
DRX_MIRROR_UNKNOWN = DRX_UNKNOWN,
/**< Unknown if spectrum is mirrored. */
DRX_MIRROR_AUTO = DRX_AUTO
/**< Autodetect if spectrum is mirrored. */
} DRXMirror_t, *pDRXMirror_t;
enum drx_mirror{
DRX_MIRROR_NO = 0, /**< Spectrum is not mirrored. */
DRX_MIRROR_YES, /**< Spectrum is mirrored. */
DRX_MIRROR_UNKNOWN = DRX_UNKNOWN,
/**< Unknown if spectrum is mirrored. */
DRX_MIRROR_AUTO = DRX_AUTO
/**< Autodetect if spectrum is mirrored. */
};
/**
* \enum DRXConstellation_t
* \enum enum drx_modulation
* \brief Constellation type of the channel.
*/
typedef enum {
DRX_CONSTELLATION_BPSK = 0, /**< Modulation is BPSK. */
DRX_CONSTELLATION_QPSK, /**< Constellation is QPSK. */
DRX_CONSTELLATION_PSK8, /**< Constellation is PSK8. */
DRX_CONSTELLATION_QAM16, /**< Constellation is QAM16. */
DRX_CONSTELLATION_QAM32, /**< Constellation is QAM32. */
DRX_CONSTELLATION_QAM64, /**< Constellation is QAM64. */
DRX_CONSTELLATION_QAM128, /**< Constellation is QAM128. */
DRX_CONSTELLATION_QAM256, /**< Constellation is QAM256. */
DRX_CONSTELLATION_QAM512, /**< Constellation is QAM512. */
DRX_CONSTELLATION_QAM1024, /**< Constellation is QAM1024. */
DRX_CONSTELLATION_QPSK_NR, /**< Constellation is QPSK_NR */
DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN,
/**< Constellation unknown. */
DRX_CONSTELLATION_AUTO = DRX_AUTO
/**< Autodetect constellation. */
} DRXConstellation_t, *pDRXConstellation_t;
enum drx_modulation {
DRX_CONSTELLATION_BPSK = 0, /**< Modulation is BPSK. */
DRX_CONSTELLATION_QPSK, /**< Constellation is QPSK. */
DRX_CONSTELLATION_PSK8, /**< Constellation is PSK8. */
DRX_CONSTELLATION_QAM16, /**< Constellation is QAM16. */
DRX_CONSTELLATION_QAM32, /**< Constellation is QAM32. */
DRX_CONSTELLATION_QAM64, /**< Constellation is QAM64. */
DRX_CONSTELLATION_QAM128, /**< Constellation is QAM128. */
DRX_CONSTELLATION_QAM256, /**< Constellation is QAM256. */
DRX_CONSTELLATION_QAM512, /**< Constellation is QAM512. */
DRX_CONSTELLATION_QAM1024, /**< Constellation is QAM1024. */
DRX_CONSTELLATION_QPSK_NR, /**< Constellation is QPSK_NR */
DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN,
/**< Constellation unknown. */
DRX_CONSTELLATION_AUTO = DRX_AUTO
/**< Autodetect constellation. */
};
/**
* \enum DRXHierarchy_t
* \enum enum drx_hierarchy
* \brief Hierarchy of the channel.
*/
typedef enum {
DRX_HIERARCHY_NONE = 0, /**< None hierarchical channel. */
DRX_HIERARCHY_ALPHA1, /**< Hierarchical channel, alpha=1. */
DRX_HIERARCHY_ALPHA2, /**< Hierarchical channel, alpha=2. */
DRX_HIERARCHY_ALPHA4, /**< Hierarchical channel, alpha=4. */
DRX_HIERARCHY_UNKNOWN = DRX_UNKNOWN,
/**< Hierarchy unknown. */
DRX_HIERARCHY_AUTO = DRX_AUTO
/**< Autodetect hierarchy. */
} DRXHierarchy_t, *pDRXHierarchy_t;
enum drx_hierarchy {
DRX_HIERARCHY_NONE = 0, /**< None hierarchical channel. */
DRX_HIERARCHY_ALPHA1, /**< Hierarchical channel, alpha=1. */
DRX_HIERARCHY_ALPHA2, /**< Hierarchical channel, alpha=2. */
DRX_HIERARCHY_ALPHA4, /**< Hierarchical channel, alpha=4. */
DRX_HIERARCHY_UNKNOWN = DRX_UNKNOWN,
/**< Hierarchy unknown. */
DRX_HIERARCHY_AUTO = DRX_AUTO
/**< Autodetect hierarchy. */
};
/**
* \enum DRXPriority_t
* \enum enum drx_priority
* \brief Channel priority in case of hierarchical transmission.
*/
typedef enum {
DRX_PRIORITY_LOW = 0, /**< Low priority channel. */
DRX_PRIORITY_HIGH, /**< High priority channel. */
DRX_PRIORITY_UNKNOWN = DRX_UNKNOWN
/**< Priority unknown. */
} DRXPriority_t, *pDRXPriority_t;
enum drx_priority {
DRX_PRIORITY_LOW = 0, /**< Low priority channel. */
DRX_PRIORITY_HIGH, /**< High priority channel. */
DRX_PRIORITY_UNKNOWN = DRX_UNKNOWN
/**< Priority unknown. */
};
/**
* \enum DRXCoderate_t
* \enum enum drx_coderate
* \brief Channel priority in case of hierarchical transmission.
*/
typedef enum {
enum drx_coderate{
DRX_CODERATE_1DIV2 = 0, /**< Code rate 1/2nd. */
DRX_CODERATE_2DIV3, /**< Code rate 2/3nd. */
DRX_CODERATE_3DIV4, /**< Code rate 3/4nd. */
@ -670,164 +651,156 @@ ENUM
/**< Code rate unknown. */
DRX_CODERATE_AUTO = DRX_AUTO
/**< Autodetect code rate. */
} DRXCoderate_t, *pDRXCoderate_t;
};
/**
* \enum DRXGuard_t
* \enum enum drx_guard
* \brief Guard interval of a channel.
*/
typedef enum {
DRX_GUARD_1DIV32 = 0, /**< Guard interval 1/32nd. */
DRX_GUARD_1DIV16, /**< Guard interval 1/16th. */
DRX_GUARD_1DIV8, /**< Guard interval 1/8th. */
DRX_GUARD_1DIV4, /**< Guard interval 1/4th. */
DRX_GUARD_UNKNOWN = DRX_UNKNOWN,
/**< Guard interval unknown. */
DRX_GUARD_AUTO = DRX_AUTO
/**< Autodetect guard interval. */
} DRXGuard_t, *pDRXGuard_t;
enum drx_guard {
DRX_GUARD_1DIV32 = 0, /**< Guard interval 1/32nd. */
DRX_GUARD_1DIV16, /**< Guard interval 1/16th. */
DRX_GUARD_1DIV8, /**< Guard interval 1/8th. */
DRX_GUARD_1DIV4, /**< Guard interval 1/4th. */
DRX_GUARD_UNKNOWN = DRX_UNKNOWN,
/**< Guard interval unknown. */
DRX_GUARD_AUTO = DRX_AUTO
/**< Autodetect guard interval. */
};
/**
* \enum DRXFftmode_t
* \enum enum drx_fft_mode
* \brief FFT mode.
*/
typedef enum {
DRX_FFTMODE_2K = 0, /**< 2K FFT mode. */
DRX_FFTMODE_4K, /**< 4K FFT mode. */
DRX_FFTMODE_8K, /**< 8K FFT mode. */
DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN,
/**< FFT mode unknown. */
DRX_FFTMODE_AUTO = DRX_AUTO
/**< Autodetect FFT mode. */
} DRXFftmode_t, *pDRXFftmode_t;
enum drx_fft_mode {
DRX_FFTMODE_2K = 0, /**< 2K FFT mode. */
DRX_FFTMODE_4K, /**< 4K FFT mode. */
DRX_FFTMODE_8K, /**< 8K FFT mode. */
DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN,
/**< FFT mode unknown. */
DRX_FFTMODE_AUTO = DRX_AUTO
/**< Autodetect FFT mode. */
};
/**
* \enum DRXClassification_t
* \enum enum drx_classification
* \brief Channel classification.
*/
typedef enum {
DRX_CLASSIFICATION_GAUSS = 0, /**< Gaussion noise. */
DRX_CLASSIFICATION_HVY_GAUSS, /**< Heavy Gaussion noise. */
DRX_CLASSIFICATION_COCHANNEL, /**< Co-channel. */
DRX_CLASSIFICATION_STATIC, /**< Static echo. */
DRX_CLASSIFICATION_MOVING, /**< Moving echo. */
DRX_CLASSIFICATION_ZERODB, /**< Zero dB echo. */
DRX_CLASSIFICATION_UNKNOWN = DRX_UNKNOWN,
/**< Unknown classification */
DRX_CLASSIFICATION_AUTO = DRX_AUTO
/**< Autodetect classification. */
} DRXClassification_t, *pDRXClassification_t;
enum drx_classification {
DRX_CLASSIFICATION_GAUSS = 0, /**< Gaussion noise. */
DRX_CLASSIFICATION_HVY_GAUSS, /**< Heavy Gaussion noise. */
DRX_CLASSIFICATION_COCHANNEL, /**< Co-channel. */
DRX_CLASSIFICATION_STATIC, /**< Static echo. */
DRX_CLASSIFICATION_MOVING, /**< Moving echo. */
DRX_CLASSIFICATION_ZERODB, /**< Zero dB echo. */
DRX_CLASSIFICATION_UNKNOWN = DRX_UNKNOWN,
/**< Unknown classification */
DRX_CLASSIFICATION_AUTO = DRX_AUTO
/**< Autodetect classification. */
};
/**
* /enum DRXInterleaveModes_t
* /enum enum drx_interleave_mode
* /brief Interleave modes
*/
typedef enum {
DRX_INTERLEAVEMODE_I128_J1 = 0,
DRX_INTERLEAVEMODE_I128_J1_V2,
DRX_INTERLEAVEMODE_I128_J2,
DRX_INTERLEAVEMODE_I64_J2,
DRX_INTERLEAVEMODE_I128_J3,
DRX_INTERLEAVEMODE_I32_J4,
DRX_INTERLEAVEMODE_I128_J4,
DRX_INTERLEAVEMODE_I16_J8,
DRX_INTERLEAVEMODE_I128_J5,
DRX_INTERLEAVEMODE_I8_J16,
DRX_INTERLEAVEMODE_I128_J6,
DRX_INTERLEAVEMODE_RESERVED_11,
DRX_INTERLEAVEMODE_I128_J7,
DRX_INTERLEAVEMODE_RESERVED_13,
DRX_INTERLEAVEMODE_I128_J8,
DRX_INTERLEAVEMODE_RESERVED_15,
DRX_INTERLEAVEMODE_I12_J17,
DRX_INTERLEAVEMODE_I5_J4,
DRX_INTERLEAVEMODE_B52_M240,
DRX_INTERLEAVEMODE_B52_M720,
DRX_INTERLEAVEMODE_B52_M48,
DRX_INTERLEAVEMODE_B52_M0,
DRX_INTERLEAVEMODE_UNKNOWN = DRX_UNKNOWN,
/**< Unknown interleave mode */
DRX_INTERLEAVEMODE_AUTO = DRX_AUTO
/**< Autodetect interleave mode */
} DRXInterleaveModes_t, *pDRXInterleaveModes_t;
enum drx_interleave_mode {
DRX_INTERLEAVEMODE_I128_J1 = 0,
DRX_INTERLEAVEMODE_I128_J1_V2,
DRX_INTERLEAVEMODE_I128_J2,
DRX_INTERLEAVEMODE_I64_J2,
DRX_INTERLEAVEMODE_I128_J3,
DRX_INTERLEAVEMODE_I32_J4,
DRX_INTERLEAVEMODE_I128_J4,
DRX_INTERLEAVEMODE_I16_J8,
DRX_INTERLEAVEMODE_I128_J5,
DRX_INTERLEAVEMODE_I8_J16,
DRX_INTERLEAVEMODE_I128_J6,
DRX_INTERLEAVEMODE_RESERVED_11,
DRX_INTERLEAVEMODE_I128_J7,
DRX_INTERLEAVEMODE_RESERVED_13,
DRX_INTERLEAVEMODE_I128_J8,
DRX_INTERLEAVEMODE_RESERVED_15,
DRX_INTERLEAVEMODE_I12_J17,
DRX_INTERLEAVEMODE_I5_J4,
DRX_INTERLEAVEMODE_B52_M240,
DRX_INTERLEAVEMODE_B52_M720,
DRX_INTERLEAVEMODE_B52_M48,
DRX_INTERLEAVEMODE_B52_M0,
DRX_INTERLEAVEMODE_UNKNOWN = DRX_UNKNOWN,
/**< Unknown interleave mode */
DRX_INTERLEAVEMODE_AUTO = DRX_AUTO
/**< Autodetect interleave mode */
};
/**
* \enum DRXCarrier_t
* \enum enum drx_carrier_mode
* \brief Channel Carrier Mode.
*/
typedef enum {
DRX_CARRIER_MULTI = 0, /**< Multi carrier mode */
DRX_CARRIER_SINGLE, /**< Single carrier mode */
DRX_CARRIER_UNKNOWN = DRX_UNKNOWN,
/**< Carrier mode unknown. */
DRX_CARRIER_AUTO = DRX_AUTO /**< Autodetect carrier mode */
} DRXCarrier_t, *pDRXCarrier_t;
enum drx_carrier_mode{
DRX_CARRIER_MULTI = 0, /**< Multi carrier mode */
DRX_CARRIER_SINGLE, /**< Single carrier mode */
DRX_CARRIER_UNKNOWN = DRX_UNKNOWN,
/**< Carrier mode unknown. */
DRX_CARRIER_AUTO = DRX_AUTO /**< Autodetect carrier mode */
};
/**
* \enum DRXFramemode_t
* \enum enum drx_frame_mode
* \brief Channel Frame Mode.
*/
typedef enum {
DRX_FRAMEMODE_420 = 0, /**< 420 with variable PN */
DRX_FRAMEMODE_595, /**< 595 */
DRX_FRAMEMODE_945, /**< 945 with variable PN */
DRX_FRAMEMODE_420_FIXED_PN,
/**< 420 with fixed PN */
DRX_FRAMEMODE_945_FIXED_PN,
/**< 945 with fixed PN */
DRX_FRAMEMODE_UNKNOWN = DRX_UNKNOWN,
/**< Frame mode unknown. */
DRX_FRAMEMODE_AUTO = DRX_AUTO
/**< Autodetect frame mode */
} DRXFramemode_t, *pDRXFramemode_t;
enum drx_frame_mode{
DRX_FRAMEMODE_420 = 0, /**< 420 with variable PN */
DRX_FRAMEMODE_595, /**< 595 */
DRX_FRAMEMODE_945, /**< 945 with variable PN */
DRX_FRAMEMODE_420_FIXED_PN,
/**< 420 with fixed PN */
DRX_FRAMEMODE_945_FIXED_PN,
/**< 945 with fixed PN */
DRX_FRAMEMODE_UNKNOWN = DRX_UNKNOWN,
/**< Frame mode unknown. */
DRX_FRAMEMODE_AUTO = DRX_AUTO
/**< Autodetect frame mode */
};
/**
* \enum DRXTPSFrame_t
* \enum enum drx_tps_frame
* \brief Frame number in current super-frame.
*/
typedef enum {
DRX_TPS_FRAME1 = 0, /**< TPS frame 1. */
DRX_TPS_FRAME2, /**< TPS frame 2. */
DRX_TPS_FRAME3, /**< TPS frame 3. */
DRX_TPS_FRAME4, /**< TPS frame 4. */
DRX_TPS_FRAME_UNKNOWN = DRX_UNKNOWN
/**< TPS frame unknown. */
} DRXTPSFrame_t, *pDRXTPSFrame_t;
enum drx_tps_frame{
DRX_TPS_FRAME1 = 0, /**< TPS frame 1. */
DRX_TPS_FRAME2, /**< TPS frame 2. */
DRX_TPS_FRAME3, /**< TPS frame 3. */
DRX_TPS_FRAME4, /**< TPS frame 4. */
DRX_TPS_FRAME_UNKNOWN = DRX_UNKNOWN
/**< TPS frame unknown. */
};
/**
* \enum DRXLDPC_t
* \enum enum drx_ldpc
* \brief TPS LDPC .
*/
typedef enum {
DRX_LDPC_0_4 = 0, /**< LDPC 0.4 */
DRX_LDPC_0_6, /**< LDPC 0.6 */
DRX_LDPC_0_8, /**< LDPC 0.8 */
DRX_LDPC_UNKNOWN = DRX_UNKNOWN,
/**< LDPC unknown. */
DRX_LDPC_AUTO = DRX_AUTO /**< Autodetect LDPC */
} DRXLDPC_t, *pDRXLDPC_t;
enum drx_ldpc{
DRX_LDPC_0_4 = 0, /**< LDPC 0.4 */
DRX_LDPC_0_6, /**< LDPC 0.6 */
DRX_LDPC_0_8, /**< LDPC 0.8 */
DRX_LDPC_UNKNOWN = DRX_UNKNOWN,
/**< LDPC unknown. */
DRX_LDPC_AUTO = DRX_AUTO /**< Autodetect LDPC */
};
/**
* \enum DRXPilotMode_t
* \enum enum drx_pilot_mode
* \brief Pilot modes in DTMB.
*/
typedef enum {
DRX_PILOT_ON = 0, /**< Pilot On */
DRX_PILOT_OFF, /**< Pilot Off */
DRX_PILOT_UNKNOWN = DRX_UNKNOWN,
/**< Pilot unknown. */
DRX_PILOT_AUTO = DRX_AUTO /**< Autodetect Pilot */
} DRXPilotMode_t, *pDRXPilotMode_t;
enum drx_pilot_mode{
DRX_PILOT_ON = 0, /**< Pilot On */
DRX_PILOT_OFF, /**< Pilot Off */
DRX_PILOT_UNKNOWN = DRX_UNKNOWN,
/**< Pilot unknown. */
DRX_PILOT_AUTO = DRX_AUTO /**< Autodetect Pilot */
};
/**
* \enum DRXCtrlIndex_t
* \brief Indices of the control functions.
*/
typedef u32 DRXCtrlIndex_t, *pDRXCtrlIndex_t;
#ifndef DRX_CTRL_BASE
#define DRX_CTRL_BASE ((DRXCtrlIndex_t)0)
#endif
#define DRX_CTRL_BASE ((u32)0)
#define DRX_CTRL_NOP ( DRX_CTRL_BASE + 0)/**< No Operation */
#define DRX_CTRL_PROBE_DEVICE ( DRX_CTRL_BASE + 1)/**< Probe device */
@ -1129,28 +1102,28 @@ STRUCTS
typedef struct {
s32 frequency;
/**< frequency in kHz */
DRXBandwidth_t bandwidth;
enum drx_bandwidth bandwidth;
/**< bandwidth */
DRXMirror_t mirror; /**< mirrored or not on RF */
DRXConstellation_t constellation;
enum drx_mirror mirror; /**< mirrored or not on RF */
enum drx_modulation constellation;
/**< constellation */
DRXHierarchy_t hierarchy;
enum drx_hierarchy hierarchy;
/**< hierarchy */
DRXPriority_t priority; /**< priority */
DRXCoderate_t coderate; /**< coderate */
DRXGuard_t guard; /**< guard interval */
DRXFftmode_t fftmode; /**< fftmode */
DRXClassification_t classification;
enum drx_priority priority; /**< priority */
enum drx_coderate coderate; /**< coderate */
enum drx_guard guard; /**< guard interval */
enum drx_fft_mode fftmode; /**< fftmode */
enum drx_classification classification;
/**< classification */
u32 symbolrate;
/**< symbolrate in symbols/sec */
DRXInterleaveModes_t interleavemode;
enum drx_interleave_mode interleavemode;
/**< interleaveMode QAM */
DRXLDPC_t ldpc; /**< ldpc */
DRXCarrier_t carrier; /**< carrier */
DRXFramemode_t framemode;
enum drx_ldpc ldpc; /**< ldpc */
enum drx_carrier_mode carrier; /**< carrier */
enum drx_frame_mode framemode;
/**< frame mode */
DRXPilotMode_t pilot; /**< pilot mode */
enum drx_pilot_mode pilot; /**< pilot mode */
} DRXChannel_t, *pDRXChannel_t;
/*========================================*/
@ -1217,7 +1190,7 @@ STRUCTS
/**< Last centre frequency in this band */
s32 step;
/**< Stepping frequency in this band */
DRXBandwidth_t bandwidth;
enum drx_bandwidth bandwidth;
/**< Bandwidth within this frequency band */
u16 chNumber;
/**< First channel number in this band, or first
@ -1250,7 +1223,7 @@ STRUCTS
typedef struct {
u32 *symbolrate; /**< list of symbolrates to scan */
u16 symbolrateSize; /**< size of symbolrate array */
pDRXConstellation_t constellation;
enum drx_modulation * constellation;
/**< list of constellations */
u16 constellationSize; /**< size of constellation array */
u16 ifAgcThreshold; /**< thresholf for IF-AGC based
@ -1303,7 +1276,7 @@ STRUCTS
/**
* \brief Inner scan function prototype.
*/
typedef DRXStatus_t(*DRXScanFunc_t) (void *scanContext,
typedef int(*DRXScanFunc_t) (void *scanContext,
DRXScanCommand_t scanCommand,
pDRXChannel_t scanChannel,
bool * getNextChannel);
@ -1317,17 +1290,17 @@ STRUCTS
* Used by DRX_CTRL_TPS_INFO.
*/
typedef struct {
DRXFftmode_t fftmode; /**< Fft mode */
DRXGuard_t guard; /**< Guard interval */
DRXConstellation_t constellation;
enum drx_fft_mode fftmode; /**< Fft mode */
enum drx_guard guard; /**< Guard interval */
enum drx_modulation constellation;
/**< Constellation */
DRXHierarchy_t hierarchy;
enum drx_hierarchy hierarchy;
/**< Hierarchy */
DRXCoderate_t highCoderate;
enum drx_coderate highCoderate;
/**< High code rate */
DRXCoderate_t lowCoderate;
enum drx_coderate lowCoderate;
/**< Low cod rate */
DRXTPSFrame_t frame; /**< Tps frame */
enum drx_tps_frame frame; /**< Tps frame */
u8 length; /**< Length */
u16 cellId; /**< Cell id */
} DRXTPSInfo_t, *pDRXTPSInfo_t;
@ -1970,71 +1943,71 @@ STRUCTS
typedef u32 DRXflags_t, *pDRXflags_t;
/* Write block of data to device */
typedef DRXStatus_t(*DRXWriteBlockFunc_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXWriteBlockFunc_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16 datasize, /* size of data in bytes */
u8 *data, /* data to send */
DRXflags_t flags);
/* Read block of data from device */
typedef DRXStatus_t(*DRXReadBlockFunc_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadBlockFunc_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16 datasize, /* size of data in bytes */
u8 *data, /* receive buffer */
DRXflags_t flags);
/* Write 8-bits value to device */
typedef DRXStatus_t(*DRXWriteReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXWriteReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u8 data, /* data to send */
DRXflags_t flags);
/* Read 8-bits value to device */
typedef DRXStatus_t(*DRXReadReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u8 *data, /* receive buffer */
DRXflags_t flags);
/* Read modify write 8-bits value to device */
typedef DRXStatus_t(*DRXReadModifyWriteReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadModifyWriteReg8Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* write address of register */
DRXaddr_t raddr, /* read address of register */
u8 wdata, /* data to write */
u8 *rdata); /* data to read */
/* Write 16-bits value to device */
typedef DRXStatus_t(*DRXWriteReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXWriteReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16 data, /* data to send */
DRXflags_t flags);
/* Read 16-bits value to device */
typedef DRXStatus_t(*DRXReadReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16 *data, /* receive buffer */
DRXflags_t flags);
/* Read modify write 16-bits value to device */
typedef DRXStatus_t(*DRXReadModifyWriteReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadModifyWriteReg16Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* write address of register */
DRXaddr_t raddr, /* read address of register */
u16 wdata, /* data to write */
u16 *rdata); /* data to read */
/* Write 32-bits value to device */
typedef DRXStatus_t(*DRXWriteReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXWriteReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u32 data, /* data to send */
DRXflags_t flags);
/* Read 32-bits value to device */
typedef DRXStatus_t(*DRXReadReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u32 *data, /* receive buffer */
DRXflags_t flags);
/* Read modify write 32-bits value to device */
typedef DRXStatus_t(*DRXReadModifyWriteReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
typedef int(*DRXReadModifyWriteReg32Func_t) (struct i2c_device_addr *devAddr, /* address of I2C device */
DRXaddr_t waddr, /* write address of register */
DRXaddr_t raddr, /* read address of register */
u32 wdata, /* data to write */
@ -2146,11 +2119,11 @@ STRUCTS
DRXChannel_t currentChannel;
/**< current channel parameters */
DRXStandard_t currentStandard;
enum drx_standard currentStandard;
/**< current standard selection */
DRXStandard_t prevStandard;
enum drx_standard prevStandard;
/**< previous standard selection */
DRXStandard_t diCacheStandard;
enum drx_standard diCacheStandard;
/**< standard in DI cache if available */
bool useBootloader; /**< use bootloader in open */
u32 capabilities; /**< capabilities flags */
@ -2163,10 +2136,10 @@ STRUCTS
*/
typedef struct DRXDemodInstance_s *pDRXDemodInstance_t;
typedef DRXStatus_t(*DRXOpenFunc_t) (pDRXDemodInstance_t demod);
typedef DRXStatus_t(*DRXCloseFunc_t) (pDRXDemodInstance_t demod);
typedef DRXStatus_t(*DRXCtrlFunc_t) (pDRXDemodInstance_t demod,
DRXCtrlIndex_t ctrl,
typedef int(*DRXOpenFunc_t) (pDRXDemodInstance_t demod);
typedef int(*DRXCloseFunc_t) (pDRXDemodInstance_t demod);
typedef int(*DRXCtrlFunc_t) (pDRXDemodInstance_t demod,
u32 ctrl,
void *ctrlData);
/**
@ -2190,7 +2163,7 @@ STRUCTS
/**< demodulator functions */
pDRXAccessFunc_t myAccessFunct;
/**< data access protocol functions */
pTUNERInstance_t myTuner;
struct tuner_instance *myTuner;
/**< tuner instance,if NULL then baseband */
struct i2c_device_addr *myI2CDevAddr;
/**< i2c address and device identifier */
@ -2865,7 +2838,7 @@ Access macros
#define DRX_ACCESSMACRO_GET( demod, value, cfgName, dataType, errorValue ) \
do { \
DRXStatus_t cfgStatus; \
int cfgStatus; \
DRXCfg_t config; \
dataType cfgData; \
config.cfgType = cfgName; \
@ -2946,21 +2919,18 @@ Access macros
Exported FUNCTIONS
-------------------------------------------------------------------------*/
DRXStatus_t DRX_Init(pDRXDemodInstance_t demods[]);
int DRX_Init(pDRXDemodInstance_t demods[]);
DRXStatus_t DRX_Term(void);
int DRX_Term(void);
DRXStatus_t DRX_Open(pDRXDemodInstance_t demod);
int DRX_Open(pDRXDemodInstance_t demod);
DRXStatus_t DRX_Close(pDRXDemodInstance_t demod);
int DRX_Close(pDRXDemodInstance_t demod);
DRXStatus_t DRX_Ctrl(pDRXDemodInstance_t demod,
DRXCtrlIndex_t ctrl, void *ctrlData);
int DRX_Ctrl(pDRXDemodInstance_t demod,
u32 ctrl, void *ctrlData);
/*-------------------------------------------------------------------------
THE END
-------------------------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
#endif /* __DRXDRIVER_H__ */

974
drivers/media/dvb-frontends/drx39xyj/drxj.c
View File

File diff suppressed because it is too large Load Diff

22
drivers/media/dvb-frontends/drx39xyj/drxj.h
View File

@ -184,7 +184,7 @@ TYPEDEFS
* Generic interface for all AGCs present on the DRXJ.
*/
typedef struct {
DRXStandard_t standard; /* standard for which these settings apply */
enum drx_standard standard; /* standard for which these settings apply */
DRXJAgcCtrlMode_t ctrlMode; /* off, user, auto */
u16 outputLevel; /* range dependent on AGC */
u16 minOutputLevel; /* range dependent on AGC */
@ -202,7 +202,7 @@ TYPEDEFS
* Interface to configure pre SAW sense.
*/
typedef struct {
DRXStandard_t standard; /* standard to which these settings apply */
enum drx_standard standard; /* standard to which these settings apply */
u16 reference; /* pre SAW reference value, range 0 .. 31 */
bool usePreSaw; /* true algorithms must use pre SAW sense */
} DRXJCfgPreSaw_t, *pDRXJCfgPreSaw_t;
@ -214,7 +214,7 @@ TYPEDEFS
* Interface to configure gain of AFE (LNA + PGA).
*/
typedef struct {
DRXStandard_t standard; /* standard to which these settings apply */
enum drx_standard standard; /* standard to which these settings apply */
u16 gain; /* gain in 0.1 dB steps, DRXJ range 140 .. 335 */
} DRXJCfgAfeGain_t, *pDRXJCfgAfeGain_t;
@ -462,13 +462,13 @@ TYPEDEFS
bool mirrorFreqSpectOOB;/**< tuner inversion (true = tuner mirrors the signal */
/* standard/channel settings */
DRXStandard_t standard; /**< current standard information */
DRXConstellation_t constellation;
enum drx_standard standard; /**< current standard information */
enum drx_modulation constellation;
/**< current constellation */
s32 frequency; /**< center signal frequency in KHz */
DRXBandwidth_t currBandwidth;
enum drx_bandwidth currBandwidth;
/**< current channel bandwidth */
DRXMirror_t mirror; /**< current channel mirror */
enum drx_mirror mirror; /**< current channel mirror */
/* signal quality information */
u32 fecBitsDesired; /**< BER accounting period */
@ -723,10 +723,10 @@ STRUCTS
Exported FUNCTIONS
-------------------------------------------------------------------------*/
extern DRXStatus_t DRXJ_Open(pDRXDemodInstance_t demod);
extern DRXStatus_t DRXJ_Close(pDRXDemodInstance_t demod);
extern DRXStatus_t DRXJ_Ctrl(pDRXDemodInstance_t demod,
DRXCtrlIndex_t ctrl, void *ctrlData);
extern int DRXJ_Open(pDRXDemodInstance_t demod);
extern int DRXJ_Close(pDRXDemodInstance_t demod);
extern int DRXJ_Ctrl(pDRXDemodInstance_t demod,
u32 ctrl, void *ctrlData);
/*-------------------------------------------------------------------------
Exported GLOBAL VARIABLES