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OMAP3: PM: MPU off-mode support
Adds a 'save_state' option when calling into SRAM idle function and adds some minor cleanups of SRAM asm code. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -28,6 +28,7 @@
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#include <plat/powerdomain.h>
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#include <plat/control.h>
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#include <plat/serial.h>
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#include <plat/sdrc.h>
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#include <asm/tlbflush.h>
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@ -223,6 +224,9 @@ static void omap_sram_idle(void)
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/* No need to save context */
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save_state = 0;
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break;
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case PWRDM_POWER_OFF:
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save_state = 3;
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break;
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default:
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/* Invalid state */
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printk(KERN_ERR "Invalid mpu state in sram_idle\n");
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@ -248,7 +252,12 @@ static void omap_sram_idle(void)
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prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
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}
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_omap_sram_idle(NULL, save_state);
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/*
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* omap3_arm_context is the location where ARM registers
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* get saved. The restore path then reads from this
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* location and restores them back.
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*/
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_omap_sram_idle(omap3_arm_context, save_state);
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cpu_init();
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/* Restore table entry modified during MMU restoration */
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@ -36,12 +36,11 @@
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OMAP3430_PM_PREPWSTST)
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#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
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OMAP3430_PM_PREPWSTST)
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#define PM_PWSTCTRL_MPU_P OMAP34XX_PRM_REGADDR(MPU_MOD, PM_PWSTCTRL)
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#define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + PM_PWSTCTRL
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#define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is
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* available */
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#define SCRATCHPAD_BASE_P OMAP343X_CTRL_REGADDR(\
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OMAP343X_CONTROL_MEM_WKUP +\
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SCRATCHPAD_MEM_OFFS)
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#define SCRATCHPAD_BASE_P (OMAP343X_CTRL_BASE + OMAP343X_CONTROL_MEM_WKUP\
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+ SCRATCHPAD_MEM_OFFS)
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#define SDRC_POWER_V OMAP34XX_SDRC_REGADDR(SDRC_POWER)
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.text
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@ -96,7 +95,7 @@ loop:
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ldmfd sp!, {r0-r12, pc} @ restore regs and return
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restore:
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/* b restore*/ @ Enable to debug restore code
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/* b restore*/ @ Enable to debug restore code
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/* Check what was the reason for mpu reset and store the reason in r9*/
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/* 1 - Only L1 and logic lost */
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/* 2 - Only L2 lost - In this case, we wont be here */
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@ -416,8 +415,6 @@ scratchpad_base:
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.word SCRATCHPAD_BASE_P
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sdrc_power:
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.word SDRC_POWER_V
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context_mem:
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.word 0x803E3E14
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clk_stabilize_delay:
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.word 0x000001FF
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assoc_mask:
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