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dma: edma: fix incorrect SG list handling
The code to handle any length SG lists calls edma_resume() even before edma_start() is called. This is incorrect because edma_resume() enables edma events on the channel after which CPU (in edma_start) cannot clear posted events by writing to ECR (per the EDMA user's guide). Because of this EDMA transfers fail to start if due to some reason there is a pending EDMA event registered even before EDMA transfers are started. This can happen if an EDMA event is a byproduct of device initialization. Fix this by calling edma_resume() only if it is not the first batch of MAX_NR_SG elements. Without this patch, MMC/SD fails to function on DA850 EVM with DMA. The behaviour is triggered by specific IP and this can explain why the issue was not reported before (example with MMC/SD on AM335x). Tested on DA850 EVM and AM335x EVM-SK using MMC/SD card. Cc: stable@vger.kernel.org # v3.12.x+ Cc: Joel Fernandes <joelf@ti.com> Acked-by: Joel Fernandes <joelf@ti.com> Tested-by: Jon Ringle <jringle@gridpoint.com> Tested-by: Alexander Holler <holler@ahsoftware.de> Reported-by: Jon Ringle <jringle@gridpoint.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -182,11 +182,13 @@ static void edma_execute(struct edma_chan *echan)
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echan->ecc->dummy_slot);
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}
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edma_resume(echan->ch_num);
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if (edesc->processed <= MAX_NR_SG) {
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dev_dbg(dev, "first transfer starting %d\n", echan->ch_num);
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edma_start(echan->ch_num);
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} else {
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dev_dbg(dev, "chan: %d: completed %d elements, resuming\n",
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echan->ch_num, edesc->processed);
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edma_resume(echan->ch_num);
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}
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/*
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