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perf/x86/rapl: Use new MSR detection interface
Using perf_msr_probe function to probe for RAPL MSRs. Adding new rapl_model_match device table, that gathers events info for given model, following the MSR and cstate module design. It will replace the current rapl_cpu_match device table and detection code in following patches. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kan <kan.liang@linux.intel.com> Cc: Liang Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: https://lkml.kernel.org/r/20190616140358.27799-5-jolsa@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -58,6 +58,7 @@
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include "../perf_event.h"
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#include "../probe.h"
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MODULE_LICENSE("GPL");
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@ -76,6 +77,17 @@ MODULE_LICENSE("GPL");
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#define INTEL_RAPL_PSYS 0x5 /* pseudo-encoding */
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#define NR_RAPL_DOMAINS 0x5
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enum perf_rapl_events {
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PERF_RAPL_PP0 = 0, /* all cores */
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PERF_RAPL_PKG, /* entire package */
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PERF_RAPL_RAM, /* DRAM */
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PERF_RAPL_PP1, /* gpu */
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PERF_RAPL_PSYS, /* psys */
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PERF_RAPL_MAX,
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};
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static const char *const rapl_domain_names[NR_RAPL_DOMAINS] __initconst = {
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"pp0-core",
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"package",
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@ -153,6 +165,11 @@ struct rapl_pmus {
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struct rapl_pmu *pmus[];
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};
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struct rapl_model {
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unsigned long events;
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bool apply_quirk;
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};
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/* 1/2^hw_unit Joule */
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static int rapl_hw_unit[NR_RAPL_DOMAINS] __read_mostly;
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static struct rapl_pmus *rapl_pmus;
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@ -538,9 +555,18 @@ static struct attribute *rapl_events_knl_attr[] = {
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NULL,
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};
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/*
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* There are no default events, but we need to create
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* "events" group (with empty attrs) before updating
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* it with detected events.
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*/
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static struct attribute *attrs_empty[] = {
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NULL,
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};
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static struct attribute_group rapl_pmu_events_group = {
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.name = "events",
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.attrs = NULL, /* patched at runtime */
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.attrs = attrs_empty,
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};
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DEFINE_RAPL_FORMAT_ATTR(event, event, "config:0-7");
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@ -561,6 +587,79 @@ static const struct attribute_group *rapl_attr_groups[] = {
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NULL,
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};
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static struct attribute *rapl_events_cores[] = {
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EVENT_PTR(rapl_cores),
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EVENT_PTR(rapl_cores_unit),
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EVENT_PTR(rapl_cores_scale),
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NULL,
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};
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static struct attribute_group rapl_events_cores_group = {
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.name = "events",
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.attrs = rapl_events_cores,
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};
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static struct attribute *rapl_events_pkg[] = {
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EVENT_PTR(rapl_pkg),
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EVENT_PTR(rapl_pkg_unit),
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EVENT_PTR(rapl_pkg_scale),
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NULL,
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};
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static struct attribute_group rapl_events_pkg_group = {
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.name = "events",
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.attrs = rapl_events_pkg,
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};
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static struct attribute *rapl_events_ram[] = {
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EVENT_PTR(rapl_ram),
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EVENT_PTR(rapl_ram_unit),
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EVENT_PTR(rapl_ram_scale),
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NULL,
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};
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static struct attribute_group rapl_events_ram_group = {
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.name = "events",
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.attrs = rapl_events_ram,
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};
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static struct attribute *rapl_events_gpu[] = {
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EVENT_PTR(rapl_gpu),
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EVENT_PTR(rapl_gpu_unit),
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EVENT_PTR(rapl_gpu_scale),
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NULL,
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};
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static struct attribute_group rapl_events_gpu_group = {
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.name = "events",
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.attrs = rapl_events_gpu,
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};
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static struct attribute *rapl_events_psys[] = {
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EVENT_PTR(rapl_psys),
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EVENT_PTR(rapl_psys_unit),
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EVENT_PTR(rapl_psys_scale),
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NULL,
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};
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static struct attribute_group rapl_events_psys_group = {
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.name = "events",
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.attrs = rapl_events_psys,
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};
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static bool test_msr(int idx, void *data)
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{
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return test_bit(idx, (unsigned long *) data);
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}
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static struct perf_msr rapl_msrs[] = {
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[PERF_RAPL_PP0] = { MSR_PP0_ENERGY_STATUS, &rapl_events_cores_group, test_msr },
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[PERF_RAPL_PKG] = { MSR_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr },
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[PERF_RAPL_RAM] = { MSR_DRAM_ENERGY_STATUS, &rapl_events_ram_group, test_msr },
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[PERF_RAPL_PP1] = { MSR_PP1_ENERGY_STATUS, &rapl_events_gpu_group, test_msr },
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[PERF_RAPL_PSYS] = { MSR_PLATFORM_ENERGY_STATUS, &rapl_events_psys_group, test_msr },
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};
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static int rapl_cpu_offline(unsigned int cpu)
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{
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struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu);
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@ -674,6 +773,15 @@ static void cleanup_rapl_pmus(void)
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kfree(rapl_pmus);
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}
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const struct attribute_group *rapl_attr_update[] = {
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&rapl_events_cores_group,
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&rapl_events_pkg_group,
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&rapl_events_ram_group,
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&rapl_events_gpu_group,
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&rapl_events_gpu_group,
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NULL,
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};
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static int __init init_rapl_pmus(void)
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{
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int maxdie = topology_max_packages() * topology_max_die_per_package();
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@ -686,6 +794,7 @@ static int __init init_rapl_pmus(void)
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rapl_pmus->maxdie = maxdie;
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rapl_pmus->pmu.attr_groups = rapl_attr_groups;
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rapl_pmus->pmu.attr_update = rapl_attr_update;
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rapl_pmus->pmu.task_ctx_nr = perf_invalid_context;
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rapl_pmus->pmu.event_init = rapl_pmu_event_init;
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rapl_pmus->pmu.add = rapl_pmu_event_add;
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@ -784,13 +893,94 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
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MODULE_DEVICE_TABLE(x86cpu, rapl_cpu_match);
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static struct rapl_model model_snb = {
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.events = BIT(PERF_RAPL_PP0) |
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_PP1),
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.apply_quirk = false,
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};
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static struct rapl_model model_snbep = {
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.events = BIT(PERF_RAPL_PP0) |
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM),
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.apply_quirk = false,
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};
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static struct rapl_model model_hsw = {
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.events = BIT(PERF_RAPL_PP0) |
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM) |
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BIT(PERF_RAPL_PP1),
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.apply_quirk = false,
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};
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static struct rapl_model model_hsx = {
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.events = BIT(PERF_RAPL_PP0) |
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM),
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.apply_quirk = true,
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};
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static struct rapl_model model_knl = {
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.events = BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM),
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.apply_quirk = true,
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};
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static struct rapl_model model_skl = {
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.events = BIT(PERF_RAPL_PP0) |
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BIT(PERF_RAPL_PKG) |
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BIT(PERF_RAPL_RAM) |
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BIT(PERF_RAPL_PP1) |
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BIT(PERF_RAPL_PSYS),
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.apply_quirk = false,
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};
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static const struct x86_cpu_id rapl_model_match[] __initconst = {
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE, model_snb),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SANDYBRIDGE_X, model_snbep),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE, model_snb),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_IVYBRIDGE_X, model_snbep),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_CORE, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_X, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_ULT, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_HASWELL_GT3E, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_CORE, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_GT3E, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_X, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_BROADWELL_XEON_D, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNL, model_knl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_XEON_PHI_KNM, model_knl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_DESKTOP, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_SKYLAKE_X, model_hsx),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_KABYLAKE_DESKTOP, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_CANNONLAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_X, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ATOM_GOLDMONT_PLUS, model_hsw),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_MOBILE, model_skl),
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X86_RAPL_MODEL_MATCH(INTEL_FAM6_ICELAKE_DESKTOP, model_skl),
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{},
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};
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static int __init rapl_pmu_init(void)
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{
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const struct x86_cpu_id *id;
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struct intel_rapl_init_fun *rapl_init;
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struct rapl_model *rm;
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bool apply_quirk;
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int ret;
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id = x86_match_cpu(rapl_model_match);
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if (!id)
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return -ENODEV;
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rm = (struct rapl_model *) id->driver_data;
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perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, false, (void *) &rm->events);
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id = x86_match_cpu(rapl_cpu_match);
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if (!id)
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return -ENODEV;
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