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staging: comedi: ni_stc.h: cleanup ni_e_series_enable_second_irq()
This function is used to enable/disable the second irq on NI e-series boards. This irq used used to generate dma requests for the counters. There are only 2 counters (NUM_GPCT) so the default case of the switch can never occur. Tidy up this function and remove the unreachable BUG(). Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -527,38 +527,31 @@ static void ni_release_cdo_mite_channel(struct comedi_device *dev)
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#endif /* PCIDMA */
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}
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/* e-series boards use the second irq signals to generate dma requests for their counters */
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#ifdef PCIDMA
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static void ni_e_series_enable_second_irq(struct comedi_device *dev,
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unsigned gpct_index, short enable)
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{
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struct ni_private *devpriv = dev->private;
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uint16_t val = 0;
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int reg;
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if (devpriv->is_m_series)
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if (devpriv->is_m_series || gpct_index > 1)
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return;
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switch (gpct_index) {
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case 0:
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if (enable) {
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devpriv->stc_writew(dev, G0_Gate_Second_Irq_Enable,
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Second_IRQ_A_Enable_Register);
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} else {
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devpriv->stc_writew(dev, 0,
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Second_IRQ_A_Enable_Register);
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}
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break;
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case 1:
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if (enable) {
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devpriv->stc_writew(dev, G1_Gate_Second_Irq_Enable,
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Second_IRQ_B_Enable_Register);
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} else {
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devpriv->stc_writew(dev, 0,
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Second_IRQ_B_Enable_Register);
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}
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break;
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default:
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BUG();
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break;
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/*
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* e-series boards use the second irq signals to generate
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* dma requests for their counters
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*/
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if (gpct_index == 0) {
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reg = Second_IRQ_A_Enable_Register;
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if (enable)
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val = G0_Gate_Second_Irq_Enable;
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} else {
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reg = Second_IRQ_B_Enable_Register;
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if (enable)
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val = G1_Gate_Second_Irq_Enable;
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}
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devpriv->stc_writew(dev, val, reg);
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}
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#endif /* PCIDMA */
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