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powerpc/e500mc: Fix wrong value of MCSR_L2MMU_MHIT
Signed-off-by: Scott Wood <scottwood@freescale.com> Reported-by: Ed Swarthout <ed.swarthout@freescale.com>
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@ -260,7 +260,7 @@
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/* e500mc */
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#define MCSR_DCPERR_MC 0x20000000UL /* D-Cache Parity Error */
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#define MCSR_L2MMU_MHIT 0x04000000UL /* Hit on multiple TLB entries */
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#define MCSR_L2MMU_MHIT 0x08000000UL /* Hit on multiple TLB entries */
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#define MCSR_NMI 0x00100000UL /* Non-Maskable Interrupt */
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#define MCSR_MAV 0x00080000UL /* MCAR address valid */
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#define MCSR_MEA 0x00040000UL /* MCAR is effective address */
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