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Staging: rts5208: helper function to manage aspm during reset

Define the helper function rtsx_reset_aspm to shorten the
rtsx_reset_chip code and get rid of the LONG_LINE checkpatch warnings.

Signed-off-by: Fabio Falzoi <fabio.falzoi84@gmail.com>
Reviewed-by: Dan Carpenter <dan.carpente@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Fabio Falzoi 2014-10-19 21:30:02 +02:00 committed by Greg Kroah-Hartman
parent b7da2d68bb
commit 5d069c8886

View File

@ -227,6 +227,42 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip)
}
#endif
static int rtsx_reset_aspm(struct rtsx_chip *chip)
{
int ret;
if (chip->dynamic_aspm) {
if (!CHK_SDIO_EXIST(chip) || !CHECK_PID(chip, 0x5288))
return STATUS_SUCCESS;
ret = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF,
chip->aspm_l0s_l1_en);
if (ret != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
return STATUS_SUCCESS;
}
if (CHECK_PID(chip, 0x5208))
RTSX_WRITE_REG(chip, ASPM_FORCE_CTL, 0xFF, 0x3F);
ret = rtsx_write_config_byte(chip, LCTLR, chip->aspm_l0s_l1_en);
if (ret != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
chip->aspm_level[0] = chip->aspm_l0s_l1_en;
if (CHK_SDIO_EXIST(chip)) {
chip->aspm_level[1] = chip->aspm_l0s_l1_en;
ret = rtsx_write_cfg_dw(chip, CHECK_PID(chip, 0x5288) ? 2 : 1,
0xC0, 0xFF, chip->aspm_l0s_l1_en);
if (ret != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
}
chip->aspm_enabled = 1;
return STATUS_SUCCESS;
}
int rtsx_reset_chip(struct rtsx_chip *chip)
{
int retval;
@ -289,37 +325,9 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
/* Enable ASPM */
if (chip->aspm_l0s_l1_en) {
if (chip->dynamic_aspm) {
if (CHK_SDIO_EXIST(chip) && CHECK_PID(chip, 0x5288)) {
retval = rtsx_write_cfg_dw(chip, 2, 0xC0, 0xFF,
chip->aspm_l0s_l1_en);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
}
} else {
if (CHECK_PID(chip, 0x5208))
RTSX_WRITE_REG(chip, ASPM_FORCE_CTL,
0xFF, 0x3F);
retval = rtsx_write_config_byte(chip, LCTLR,
chip->aspm_l0s_l1_en);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
chip->aspm_level[0] = chip->aspm_l0s_l1_en;
if (CHK_SDIO_EXIST(chip)) {
chip->aspm_level[1] = chip->aspm_l0s_l1_en;
retval = rtsx_write_cfg_dw(chip,
CHECK_PID(chip, 0x5288) ? 2 : 1,
0xC0, 0xFF,
chip->aspm_l0s_l1_en);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
}
chip->aspm_enabled = 1;
}
retval = rtsx_reset_aspm(chip);
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
} else {
if (chip->asic_code && CHECK_PID(chip, 0x5208)) {
retval = rtsx_write_phy_register(chip, 0x07, 0x0129);