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Merge branch 'ixp4xx' into devel

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Conflicts:

	include/asm-arm/arch-ixp4xx/io.h
This commit is contained in:
Russell King 2007-05-06 20:58:29 +01:00 committed by Russell King
commit 5cd4715515
19 changed files with 656 additions and 35 deletions
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2
arch/arm/configs/ixp4xx_defconfig
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@ -117,11 +117,13 @@ CONFIG_ARCH_ADI_COYOTE=y
CONFIG_ARCH_IXDP425=y
CONFIG_MACH_IXDPG425=y
CONFIG_MACH_IXDP465=y
CONFIG_MACH_KIXRP435=y
CONFIG_ARCH_IXCDP1100=y
CONFIG_ARCH_PRPMC1100=y
CONFIG_MACH_NAS100D=y
CONFIG_ARCH_IXDP4XX=y
CONFIG_CPU_IXP46X=y
CONFIG_CPU_IXP43X=y
# CONFIG_MACH_GTWX5715 is not set
#

22
arch/arm/mach-ixp4xx/Kconfig
View File

@ -62,6 +62,12 @@ config MACH_IXDP465
IXDP465 Development Platform (Also known as BMP).
For more information on this platform, see <file:Documentation/arm/IXP4xx>.
config MACH_KIXRP435
bool "KIXRP435"
help
Say 'Y' here if you want your kernel to support Intel's
KIXRP435 Reference Platform.
For more information on this platform, see <file:Documentation/arm/IXP4xx>.
#
# IXCDP1100 is the exact same HW as IXDP425, but with a different machine
@ -89,12 +95,21 @@ config MACH_NAS100D
NAS 100d device. For more information on this platform,
see http://www.nslu2-linux.org/wiki/NAS100d/HomePage
config MACH_DSMG600
bool
prompt "D-Link DSM-G600 RevA"
select PCI
help
Say 'Y' here if you want your kernel to support D-Link's
DSM-G600 RevA device. For more information on this platform,
see http://www.nslu2-linux.org/wiki/DSMG600/HomePage
#
# Avila and IXDP share the same source for now. Will change in future
#
config ARCH_IXDP4XX
bool
depends on ARCH_IXDP425 || MACH_IXDP465
depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
default y
#
@ -105,6 +120,11 @@ config CPU_IXP46X
depends on MACH_IXDP465
default y
config CPU_IXP43X
bool
depends on MACH_KIXRP435
default y
config MACH_GTWX5715
bool "Gemtek WX5715 (Linksys WRV54G)"
depends on ARCH_IXP4XX

2
arch/arm/mach-ixp4xx/Makefile
View File

@ -12,6 +12,7 @@ obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o
obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
obj-y += common.o
@ -22,5 +23,6 @@ obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o nslu2-power.o
obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o nas100d-power.o
obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o dsmg600-power.o
obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o

4
arch/arm/mach-ixp4xx/common-pci.c
View File

@ -374,7 +374,7 @@ void __init ixp4xx_pci_preinit(void)
* Determine which PCI read method to use.
* Rev 0 IXP425 requires workaround.
*/
if (!(processor_id & 0xf) && !cpu_is_ixp46x()) {
if (!(processor_id & 0xf) && cpu_is_ixp42x()) {
printk("PCI: IXP42x A0 silicon detected - "
"PCI Non-Prefetch Workaround Enabled\n");
ixp4xx_pci_read = ixp4xx_pci_read_errata;
@ -480,7 +480,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys)
res[0].flags = IORESOURCE_IO;
res[1].name = "PCI Memory Space";
res[1].start = 0x48000000;
res[1].start = PCIBIOS_MIN_MEM;
#ifndef CONFIG_IXP4XX_INDIRECT_PCI
res[1].end = 0x4bffffff;
#else

29
arch/arm/mach-ixp4xx/common.c
View File

@ -105,6 +105,29 @@ static signed char irq2gpio[32] = {
7, 8, 9, 10, 11, 12, -1, -1,
};
int gpio_to_irq(int gpio)
{
int irq;
for (irq = 0; irq < 32; irq++) {
if (irq2gpio[irq] == gpio)
return irq;
}
return -EINVAL;
}
EXPORT_SYMBOL(gpio_to_irq);
int irq_to_gpio(int irq)
{
int gpio = (irq < 32) ? irq2gpio[irq] : -EINVAL;
if (gpio == -1)
return -EINVAL;
return gpio;
}
EXPORT_SYMBOL(irq_to_gpio);
static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
{
int line = irq2gpio[irq];
@ -172,7 +195,7 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
static void ixp4xx_irq_mask(unsigned int irq)
{
if (cpu_is_ixp46x() && irq >= 32)
if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
*IXP4XX_ICMR2 &= ~(1 << (irq - 32));
else
*IXP4XX_ICMR &= ~(1 << irq);
@ -195,7 +218,7 @@ static void ixp4xx_irq_unmask(unsigned int irq)
if (!(ixp4xx_irq_edge & (1 << irq)))
ixp4xx_irq_ack(irq);
if (cpu_is_ixp46x() && irq >= 32)
if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32)
*IXP4XX_ICMR2 |= (1 << (irq - 32));
else
*IXP4XX_ICMR |= (1 << irq);
@ -219,7 +242,7 @@ void __init ixp4xx_init_irq(void)
/* Disable all interrupt */
*IXP4XX_ICMR = 0x0;
if (cpu_is_ixp46x()) {
if (cpu_is_ixp46x() || cpu_is_ixp43x()) {
/* Route upper 32 sources to IRQ instead of FIQ */
*IXP4XX_ICLR2 = 0x00;

74
arch/arm/mach-ixp4xx/dsmg600-pci.c Normal file
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@ -0,0 +1,74 @@
/*
* DSM-G600 board-level PCI initialization
*
* Copyright (C) 2006 Tower Technologies
* Author: Alessandro Zummo <a.zummo@towertech.it>
*
* based on ixdp425-pci.c:
* Copyright (C) 2002 Intel Corporation.
* Copyright (C) 2003-2004 MontaVista Software, Inc.
*
* Maintainer: http://www.nslu2-linux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
void __init dsmg600_pci_preinit(void)
{
set_irq_type(IRQ_DSMG600_PCI_INTA, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTB, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTC, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTD, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTE, IRQT_LOW);
set_irq_type(IRQ_DSMG600_PCI_INTF, IRQT_LOW);
ixp4xx_pci_preinit();
}
static int __init dsmg600_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
static int pci_irq_table[DSMG600_PCI_MAX_DEV][DSMG600_PCI_IRQ_LINES] =
{
{ IRQ_DSMG600_PCI_INTE, -1, -1 },
{ IRQ_DSMG600_PCI_INTA, -1, -1 },
{ IRQ_DSMG600_PCI_INTB, IRQ_DSMG600_PCI_INTC, IRQ_DSMG600_PCI_INTD },
{ IRQ_DSMG600_PCI_INTF, -1, -1 },
};
int irq = -1;
if (slot >= 1 && slot <= DSMG600_PCI_MAX_DEV &&
pin >= 1 && pin <= DSMG600_PCI_IRQ_LINES)
irq = pci_irq_table[slot-1][pin-1];
return irq;
}
struct hw_pci __initdata dsmg600_pci = {
.nr_controllers = 1,
.preinit = dsmg600_pci_preinit,
.swizzle = pci_std_swizzle,
.setup = ixp4xx_setup,
.scan = ixp4xx_scan_bus,
.map_irq = dsmg600_map_irq,
};
int __init dsmg600_pci_init(void)
{
if (machine_is_dsmg600())
pci_common_init(&dsmg600_pci);
return 0;
}
subsys_initcall(dsmg600_pci_init);

125
arch/arm/mach-ixp4xx/dsmg600-power.c Normal file
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@ -0,0 +1,125 @@
/*
* arch/arm/mach-ixp4xx/dsmg600-power.c
*
* DSM-G600 Power/Reset driver
* Author: Michael Westerhof <mwester@dls.net>
*
* Based on nslu2-power.c
* Copyright (C) 2005 Tower Technologies
* Author: Alessandro Zummo <a.zummo@towertech.it>
*
* which was based on nslu2-io.c
* Copyright (C) 2004 Karen Spearel
*
* Maintainers: http://www.nslu2-linux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/module.h>
#include <linux/reboot.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/jiffies.h>
#include <linux/timer.h>
#include <asm/mach-types.h>
extern void ctrl_alt_del(void);
/* This is used to make sure the power-button pusher is serious. The button
* must be held until the value of this counter reaches zero.
*/
static volatile int power_button_countdown;
/* Must hold the button down for at least this many counts to be processed */
#define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
static void dsmg600_power_handler(unsigned long data);
static DEFINE_TIMER(dsmg600_power_timer, dsmg600_power_handler, 0, 0);
static void dsmg600_power_handler(unsigned long data)
{
/* This routine is called twice per second to check the
* state of the power button.
*/
if (*IXP4XX_GPIO_GPINR & DSMG600_PB_BM) {
/* IO Pin is 1 (button pushed) */
if (power_button_countdown == 0) {
/* Signal init to do the ctrlaltdel action, this will bypass
* init if it hasn't started and do a kernel_restart.
*/
ctrl_alt_del();
/* Change the state of the power LED to "blink" */
gpio_line_set(DSMG600_LED_PWR_GPIO, IXP4XX_GPIO_LOW);
}
power_button_countdown--;
} else {
power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
}
mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500));
}
static irqreturn_t dsmg600_reset_handler(int irq, void *dev_id)
{
/* This is the paper-clip reset, it shuts the machine down directly. */
machine_power_off();
return IRQ_HANDLED;
}
static int __init dsmg600_power_init(void)
{
if (!(machine_is_dsmg600()))
return 0;
if (request_irq(DSMG600_RB_IRQ, &dsmg600_reset_handler,
IRQF_DISABLED | IRQF_TRIGGER_LOW, "DSM-G600 reset button",
NULL) < 0) {
printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
DSMG600_RB_IRQ);
return -EIO;
}
/* The power button on the D-Link DSM-G600 is on GPIO 15, but
* it cannot handle interrupts on that GPIO line. So we'll
* have to poll it with a kernel timer.
*/
/* Make sure that the power button GPIO is set up as an input */
gpio_line_config(DSMG600_PB_GPIO, IXP4XX_GPIO_IN);
/* Set the initial value for the power button IRQ handler */
power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500));
return 0;
}
static void __exit dsmg600_power_exit(void)
{
if (!(machine_is_dsmg600()))
return;
del_timer_sync(&dsmg600_power_timer);
free_irq(DSMG600_RB_IRQ, NULL);
}
module_init(dsmg600_power_init);
module_exit(dsmg600_power_exit);
MODULE_AUTHOR("Michael Westerhof <mwester@dls.net>");
MODULE_DESCRIPTION("DSM-G600 Power/Reset driver");
MODULE_LICENSE("GPL");

175
arch/arm/mach-ixp4xx/dsmg600-setup.c Normal file
View File

@ -0,0 +1,175 @@
/*
* DSM-G600 board-setup
*
* Copyright (C) 2006 Tower Technologies
* Author: Alessandro Zummo <a.zummo@towertech.it>
*
* based ixdp425-setup.c:
* Copyright (C) 2003-2004 MontaVista Software, Inc.
*
* Author: Alessandro Zummo <a.zummo@towertech.it>
* Maintainers: http://www.nslu2-linux.org/
*/
#include <linux/kernel.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
static struct flash_platform_data dsmg600_flash_data = {
.map_name = "cfi_probe",
.width = 2,
};
static struct resource dsmg600_flash_resource = {
.flags = IORESOURCE_MEM,
};
static struct platform_device dsmg600_flash = {
.name = "IXP4XX-Flash",
.id = 0,
.dev.platform_data = &dsmg600_flash_data,
.num_resources = 1,
.resource = &dsmg600_flash_resource,
};
static struct ixp4xx_i2c_pins dsmg600_i2c_gpio_pins = {
.sda_pin = DSMG600_SDA_PIN,
.scl_pin = DSMG600_SCL_PIN,
};
static struct platform_device dsmg600_i2c_controller = {
.name = "IXP4XX-I2C",
.id = 0,
.dev.platform_data = &dsmg600_i2c_gpio_pins,
};
#ifdef CONFIG_LEDS_CLASS
static struct resource dsmg600_led_resources[] = {
{
.name = "power",
.start = DSMG600_LED_PWR_GPIO,
.end = DSMG600_LED_PWR_GPIO,
.flags = IXP4XX_GPIO_HIGH,
},
{
.name = "wlan",
.start = DSMG600_LED_WLAN_GPIO,
.end = DSMG600_LED_WLAN_GPIO,
.flags = IXP4XX_GPIO_LOW,
},
};
static struct platform_device dsmg600_leds = {
.name = "IXP4XX-GPIO-LED",
.id = -1,
.num_resources = ARRAY_SIZE(dsmg600_led_resources),
.resource = dsmg600_led_resources,
};
#endif
static struct resource dsmg600_uart_resources[] = {
{
.start = IXP4XX_UART1_BASE_PHYS,
.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
.flags = IORESOURCE_MEM,
},
{
.start = IXP4XX_UART2_BASE_PHYS,
.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
.flags = IORESOURCE_MEM,
}
};
static struct plat_serial8250_port dsmg600_uart_data[] = {
{
.mapbase = IXP4XX_UART1_BASE_PHYS,
.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
.irq = IRQ_IXP4XX_UART1,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = IXP4XX_UART_XTAL,
},
{
.mapbase = IXP4XX_UART2_BASE_PHYS,
.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
.irq = IRQ_IXP4XX_UART2,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = IXP4XX_UART_XTAL,
},
{ }
};
static struct platform_device dsmg600_uart = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev.platform_data = dsmg600_uart_data,
.num_resources = ARRAY_SIZE(dsmg600_uart_resources),
.resource = dsmg600_uart_resources,
};
static struct platform_device *dsmg600_devices[] __initdata = {
&dsmg600_i2c_controller,
&dsmg600_flash,
};
static void dsmg600_power_off(void)
{
/* enable the pwr cntl gpio */
gpio_line_config(DSMG600_PO_GPIO, IXP4XX_GPIO_OUT);
/* poweroff */
gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH);
}
static void __init dsmg600_init(void)
{
ixp4xx_sys_init();
/* Make sure that GPIO14 and GPIO15 are not used as clocks */
*IXP4XX_GPIO_GPCLKR = 0;
dsmg600_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
dsmg600_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
pm_power_off = dsmg600_power_off;
/* The UART is required on the DSM-G600 (Redboot cannot use the
* NIC) -- do it here so that it does *not* get removed if
* platform_add_devices fails!
*/
(void)platform_device_register(&dsmg600_uart);
platform_add_devices(dsmg600_devices, ARRAY_SIZE(dsmg600_devices));
#ifdef CONFIG_LEDS_CLASS
/* We don't care whether or not this works. */
(void)platform_device_register(&dsmg600_leds);
#endif
}
static void __init dsmg600_fixup(struct machine_desc *desc,
struct tag *tags, char **cmdline, struct meminfo *mi)
{
/* The xtal on this machine is non-standard. */
ixp4xx_timer_freq = DSMG600_FREQ;
}
MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
/* Maintainer: www.nslu2-linux.org */
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
.boot_params = 0x00000100,
.fixup = dsmg600_fixup,
.map_io = ixp4xx_map_io,
.init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer,
.init_machine = dsmg600_init,
MACHINE_END

2
arch/arm/mach-ixp4xx/ixdp425-pci.c
View File

@ -66,7 +66,7 @@ struct hw_pci ixdp425_pci __initdata = {
int __init ixdp425_pci_init(void)
{
if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
machine_is_ixdp465())
machine_is_ixdp465() || machine_is_kixrp435())
pci_common_init(&ixdp425_pci);
return 0;
}

18
arch/arm/mach-ixp4xx/ixdp425-setup.c
View File

@ -115,6 +115,11 @@ static void __init ixdp425_init(void)
ixdp425_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
if (cpu_is_ixp43x()) {
ixdp425_uart.num_resources = 1;
ixdp425_uart_data[1].flags = 0;
}
platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
}
@ -156,3 +161,16 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
.init_machine = ixdp425_init,
MACHINE_END
#endif
#ifdef CONFIG_MACH_KIXRP435
MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
/* Maintainer: MontaVista Software, Inc. */
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
.map_io = ixp4xx_map_io,
.init_irq = ixp4xx_init_irq,
.timer = &ixp4xx_timer,
.boot_params = 0x0100,
.init_machine = ixdp425_init,
MACHINE_END
#endif

28
arch/arm/mm/proc-xscale.S
View File

@ -584,6 +584,11 @@ cpu_ixp42x_name:
.asciz "XScale-IXP42x Family"
.size cpu_ixp42x_name, . - cpu_ixp42x_name
.type cpu_ixp43x_name, #object
cpu_ixp43x_name:
.asciz "XScale-IXP43x Family"
.size cpu_ixp43x_name, . - cpu_ixp43x_name
.type cpu_ixp46x_name, #object
cpu_ixp46x_name:
.asciz "XScale-IXP46x Family"
@ -843,6 +848,29 @@ __ixp42x_proc_info:
.long xscale_cache_fns
.size __ixp42x_proc_info, . - __ixp42x_proc_info
.type __ixp43x_proc_info, #object
__ixp43x_proc_info:
.long 0x69054040
.long 0xfffffff0
.long PMD_TYPE_SECT | \
PMD_SECT_BUFFERABLE | \
PMD_SECT_CACHEABLE | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
.long PMD_TYPE_SECT | \
PMD_SECT_AP_WRITE | \
PMD_SECT_AP_READ
b __xscale_setup
.long cpu_arch_name
.long cpu_elf_name
.long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
.long cpu_ixp43x_name
.long xscale_processor_functions
.long v4wbi_tlb_fns
.long xscale_mc_user_fns
.long xscale_cache_fns
.size __ixp43x_proc_info, . - __ixp43x_proc_info
.type __ixp46x_proc_info, #object
__ixp46x_proc_info:
.long 0x69054200

31
include/asm-arm/arch-ixp4xx/cpu.h Normal file
View File

@ -0,0 +1,31 @@
/*
* include/asm-arm/arch-ixp4xx/cpu.h
*
* IXP4XX cpu type detection
*
* Copyright (C) 2007 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#ifndef __ASM_ARCH_CPU_H__
#define __ASM_ARCH_CPU_H__
extern unsigned int processor_id;
/* Processor id value in CP15 Register 0 */
#define IXP425_PROCESSOR_ID_VALUE 0x690541c0
#define IXP435_PROCESSOR_ID_VALUE 0x69054040
#define IXP465_PROCESSOR_ID_VALUE 0x69054200
#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0
#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
IXP425_PROCESSOR_ID_VALUE)
#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
IXP435_PROCESSOR_ID_VALUE)
#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
IXP465_PROCESSOR_ID_VALUE)
#endif /* _ASM_ARCH_CPU_H */

57
include/asm-arm/arch-ixp4xx/dsmg600.h Normal file
View File

@ -0,0 +1,57 @@
/*
* DSM-G600 platform specific definitions
*
* Copyright (C) 2006 Tower Technologies
* Author: Alessandro Zummo <a.zummo@towertech.it>
*
* based on ixdp425.h:
* Copyright 2004 (C) MontaVista, Software, Inc.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __ASM_ARCH_HARDWARE_H__
#error "Do not include this directly, instead #include <asm/hardware.h>"
#endif
#define DSMG600_SDA_PIN 5
#define DSMG600_SCL_PIN 4
/*
* DSMG600 PCI IRQs
*/
#define DSMG600_PCI_MAX_DEV 4
#define DSMG600_PCI_IRQ_LINES 3
/* PCI controller GPIO to IRQ pin mappings */
#define DSMG600_PCI_INTA_PIN 11
#define DSMG600_PCI_INTB_PIN 10
#define DSMG600_PCI_INTC_PIN 9
#define DSMG600_PCI_INTD_PIN 8
#define DSMG600_PCI_INTE_PIN 7
#define DSMG600_PCI_INTF_PIN 6
/* DSM-G600 Timer Setting */
#define DSMG600_FREQ 66000000
/* Buttons */
#define DSMG600_PB_GPIO 15 /* power button */
#define DSMG600_PB_BM (1L << DSMG600_PB_GPIO)
#define DSMG600_RB_GPIO 3 /* reset button */
#define DSMG600_RB_IRQ IRQ_IXP4XX_GPIO3
#define DSMG600_PO_GPIO 2 /* power off */
/* LEDs */
#define DSMG600_LED_PWR_GPIO 0
#define DSMG600_LED_PWR_BM (1L << DSMG600_LED_PWR_GPIO)
#define DSMG600_LED_WLAN_GPIO 14
#define DSMG600_LED_WLAN_BM (1L << DSMG600_LED_WLAN_GPIO)

4
include/asm-arm/arch-ixp4xx/entry-macro.S
View File

@ -31,9 +31,9 @@
1001:
/*
* IXP465 has an upper IRQ status register
* IXP465/IXP435 has an upper IRQ status register
*/
#if defined(CONFIG_CPU_IXP46X)
#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
ldr \irqstat, [\irqstat] @ get upper interrupts
mov \irqnr, #63

73
include/asm-arm/arch-ixp4xx/gpio.h Normal file
View File

@ -0,0 +1,73 @@
/*
* linux/include/asm-arm/arch-ixp4xx/gpio.h
*
* IXP4XX GPIO wrappers for arch-neutral GPIO calls
*
* Written by Milan Svoboda <msvoboda@ra.rockwell.com>
* Based on PXA implementation by Philipp Zabel <philipp.zabel@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef __ASM_ARCH_IXP4XX_GPIO_H
#define __ASM_ARCH_IXP4XX_GPIO_H
#include <asm/hardware.h>
static inline int gpio_request(unsigned gpio, const char *label)
{
return 0;
}
static inline void gpio_free(unsigned gpio)
{
return;
}
static inline int gpio_direction_input(unsigned gpio)
{
gpio_line_config(gpio, IXP4XX_GPIO_IN);
return 0;
}
static inline int gpio_direction_output(unsigned gpio, int level)
{
gpio_line_set(gpio, level);
gpio_line_config(gpio, IXP4XX_GPIO_OUT);
return 0;
}
static inline int gpio_get_value(unsigned gpio)
{
int value;
gpio_line_get(gpio, &value);
return value;
}
static inline void gpio_set_value(unsigned gpio, int value)
{
gpio_line_set(gpio, value);
}
#include <asm-generic/gpio.h> /* cansleep wrappers */
extern int gpio_to_irq(int gpio);
extern int irq_to_gpio(int gpio);
#endif

12
include/asm-arm/arch-ixp4xx/hardware.h
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@ -17,8 +17,8 @@
#ifndef __ASM_ARCH_HARDWARE_H__
#define __ASM_ARCH_HARDWARE_H__
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM 0x48000000
#define PCIBIOS_MIN_IO 0x00001000
#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
/*
* We override the standard dma-mask routines for bouncing.
@ -27,11 +27,8 @@
#define pcibios_assign_all_busses() 1
#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__)
extern unsigned int processor_id;
#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200)
#else
#define cpu_is_ixp465() (0)
#ifndef __ASSEMBLER__
#include <asm/arch/cpu.h>
#endif
/* Register locations and bits */
@ -47,5 +44,6 @@ extern unsigned int processor_id;
#include "prpmc1100.h"
#include "nslu2.h"
#include "nas100d.h"
#include "dsmg600.h"
#endif /* _ASM_ARCH_HARDWARE_H */

2
include/asm-arm/arch-ixp4xx/io.h
View File

@ -61,7 +61,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
static inline void __iomem *
__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype)
{
if((addr < 0x48000000) || (addr > 0x4fffffff))
if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff))
return __arm_ioremap(addr, size, mtype);
return (void *)addr;

16
include/asm-arm/arch-ixp4xx/irqs.h
View File

@ -62,10 +62,10 @@
/*
* Only first 32 sources are valid if running on IXP42x systems
*/
#ifndef CONFIG_CPU_IXP46X
#define NR_IRQS 32
#else
#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
#define NR_IRQS 64
#else
#define NR_IRQS 32
#endif
#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU)
@ -118,4 +118,14 @@
#define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8
#define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7
/*
* D-Link DSM-G600 RevA board IRQs
*/
#define IRQ_DSMG600_PCI_INTA IRQ_IXP4XX_GPIO11
#define IRQ_DSMG600_PCI_INTB IRQ_IXP4XX_GPIO10
#define IRQ_DSMG600_PCI_INTC IRQ_IXP4XX_GPIO9
#define IRQ_DSMG600_PCI_INTD IRQ_IXP4XX_GPIO8
#define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7
#define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6
#endif

15
include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
View File

@ -607,19 +607,4 @@
#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
#ifndef __ASSEMBLY__
static inline int cpu_is_ixp46x(void)
{
#ifdef CONFIG_CPU_IXP46X
unsigned int processor_id;
asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
if ((processor_id & 0xffffff00) == 0x69054200)
return 1;
#endif
return 0;
}
#endif
#endif