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powerpc: Make eh value more explicit when using lwarx

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Just like the first patch of this series, define a local 'eh' in order
to make the code clearer.

And IS_ENABLED() returns either 1 or 0 so no need to do
IS_ENABLED(CONFIG_PPC64) ? 1 : 0.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
[mpe: Use symbolic names, use 'n' constraint per Segher]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/629befaa2d05e2922346e58a383886510d6af55a.1659430931.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy 2022-08-02 11:02:38 +02:00 committed by Michael Ellerman
parent eb5a33ea31
commit 5cccf7a521
1 changed files with 3 additions and 2 deletions
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5
arch/powerpc/include/asm/atomic.h
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@ -140,9 +140,10 @@ static __always_inline bool
arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new) arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
{ {
int r, o = *old; int r, o = *old;
unsigned int eh = IS_ENABLED(CONFIG_PPC64);
__asm__ __volatile__ ( __asm__ __volatile__ (
"1: lwarx %0,0,%2,%5 # atomic_try_cmpxchg_acquire \n" "1: lwarx %0,0,%2,%[eh] # atomic_try_cmpxchg_acquire \n"
" cmpw 0,%0,%3 \n" " cmpw 0,%0,%3 \n"
" bne- 2f \n" " bne- 2f \n"
" stwcx. %4,0,%2 \n" " stwcx. %4,0,%2 \n"
@ -150,7 +151,7 @@ arch_atomic_try_cmpxchg_lock(atomic_t *v, int *old, int new)
"\t" PPC_ACQUIRE_BARRIER " \n" "\t" PPC_ACQUIRE_BARRIER " \n"
"2: \n" "2: \n"
: "=&r" (r), "+m" (v->counter) : "=&r" (r), "+m" (v->counter)
: "r" (&v->counter), "r" (o), "r" (new), "i" (IS_ENABLED(CONFIG_PPC64) ? 1 : 0) : "r" (&v->counter), "r" (o), "r" (new), [eh] "n" (eh)
: "cr0", "memory"); : "cr0", "memory");
if (unlikely(r != o)) if (unlikely(r != o))