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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-11 23:03:55 +08:00

DMA40 fixes for earlier submitted driver patches:

- Fix various error path and sparse bugs in the DMA40 driver
 - Fix various compile errors in the ux500 crypto driver
   (dependent on the DMA40 changes).
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Merge tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij:
DMA40 fixes for earlier submitted driver patches:
- Fix various error path and sparse bugs in the DMA40 driver
- Fix various compile errors in the ux500 crypto driver
  (dependent on the DMA40 changes).

* tag 'ux500-dma40-for-arm-soc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  crypto: ux500: use dmaengine_submit API
  crypto: ux500: use dmaengine_prep_slave_sg API
  crypto: ux500: use dmaengine_device_control API
  crypto: ux500/crypt: add missing __iomem qualifiers
  crypto: ux500/hash: add missing static qualifiers
  crypto: ux500/hash: use readl on iomem addresses
  dmaengine: ste_dma40: Declare memcpy config as static
  dmaengine: ste_dma40: fix error return code in d40_probe()

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-06-25 11:20:15 -07:00
commit 5c913a9a97
4 changed files with 40 additions and 41 deletions

View File

@ -291,7 +291,7 @@ void cryp_save_device_context(struct cryp_device_data *device_data,
int cryp_mode) int cryp_mode)
{ {
enum cryp_algo_mode algomode; enum cryp_algo_mode algomode;
struct cryp_register *src_reg = device_data->base; struct cryp_register __iomem *src_reg = device_data->base;
struct cryp_config *config = struct cryp_config *config =
(struct cryp_config *)device_data->current_ctx; (struct cryp_config *)device_data->current_ctx;
@ -349,7 +349,7 @@ void cryp_save_device_context(struct cryp_device_data *device_data,
void cryp_restore_device_context(struct cryp_device_data *device_data, void cryp_restore_device_context(struct cryp_device_data *device_data,
struct cryp_device_context *ctx) struct cryp_device_context *ctx)
{ {
struct cryp_register *reg = device_data->base; struct cryp_register __iomem *reg = device_data->base;
struct cryp_config *config = struct cryp_config *config =
(struct cryp_config *)device_data->current_ctx; (struct cryp_config *)device_data->current_ctx;

View File

@ -553,10 +553,10 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer " dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer "
"(TO_DEVICE)", __func__); "(TO_DEVICE)", __func__);
desc = channel->device->device_prep_slave_sg(channel, desc = dmaengine_prep_slave_sg(channel,
ctx->device->dma.sg_src, ctx->device->dma.sg_src,
ctx->device->dma.sg_src_len, ctx->device->dma.sg_src_len,
direction, DMA_CTRL_ACK, NULL); direction, DMA_CTRL_ACK);
break; break;
case DMA_FROM_DEVICE: case DMA_FROM_DEVICE:
@ -577,12 +577,12 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer " dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer "
"(FROM_DEVICE)", __func__); "(FROM_DEVICE)", __func__);
desc = channel->device->device_prep_slave_sg(channel, desc = dmaengine_prep_slave_sg(channel,
ctx->device->dma.sg_dst, ctx->device->dma.sg_dst,
ctx->device->dma.sg_dst_len, ctx->device->dma.sg_dst_len,
direction, direction,
DMA_CTRL_ACK | DMA_CTRL_ACK |
DMA_PREP_INTERRUPT, NULL); DMA_PREP_INTERRUPT);
desc->callback = cryp_dma_out_callback; desc->callback = cryp_dma_out_callback;
desc->callback_param = ctx; desc->callback_param = ctx;
@ -594,7 +594,7 @@ static int cryp_set_dma_transfer(struct cryp_ctx *ctx,
return -EFAULT; return -EFAULT;
} }
cookie = desc->tx_submit(desc); cookie = dmaengine_submit(desc);
dma_async_issue_pending(channel); dma_async_issue_pending(channel);
return 0; return 0;
@ -607,12 +607,12 @@ static void cryp_dma_done(struct cryp_ctx *ctx)
dev_dbg(ctx->device->dev, "[%s]: ", __func__); dev_dbg(ctx->device->dev, "[%s]: ", __func__);
chan = ctx->device->dma.chan_mem2cryp; chan = ctx->device->dma.chan_mem2cryp;
chan->device->device_control(chan, DMA_TERMINATE_ALL, 0); dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
dma_unmap_sg(chan->device->dev, ctx->device->dma.sg_src, dma_unmap_sg(chan->device->dev, ctx->device->dma.sg_src,
ctx->device->dma.sg_src_len, DMA_TO_DEVICE); ctx->device->dma.sg_src_len, DMA_TO_DEVICE);
chan = ctx->device->dma.chan_cryp2mem; chan = ctx->device->dma.chan_cryp2mem;
chan->device->device_control(chan, DMA_TERMINATE_ALL, 0); dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
dma_unmap_sg(chan->device->dev, ctx->device->dma.sg_dst, dma_unmap_sg(chan->device->dev, ctx->device->dma.sg_dst,
ctx->device->dma.sg_dst_len, DMA_FROM_DEVICE); ctx->device->dma.sg_dst_len, DMA_FROM_DEVICE);
} }

View File

@ -180,9 +180,9 @@ static int hash_set_dma_transfer(struct hash_ctx *ctx, struct scatterlist *sg,
dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer " dev_dbg(ctx->device->dev, "[%s]: Setting up DMA for buffer "
"(TO_DEVICE)", __func__); "(TO_DEVICE)", __func__);
desc = channel->device->device_prep_slave_sg(channel, desc = dmaengine_prep_slave_sg(channel,
ctx->device->dma.sg, ctx->device->dma.sg_len, ctx->device->dma.sg, ctx->device->dma.sg_len,
direction, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); direction, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
if (!desc) { if (!desc) {
dev_err(ctx->device->dev, dev_err(ctx->device->dev,
"[%s]: device_prep_slave_sg() failed!", __func__); "[%s]: device_prep_slave_sg() failed!", __func__);
@ -192,7 +192,7 @@ static int hash_set_dma_transfer(struct hash_ctx *ctx, struct scatterlist *sg,
desc->callback = hash_dma_callback; desc->callback = hash_dma_callback;
desc->callback_param = ctx; desc->callback_param = ctx;
cookie = desc->tx_submit(desc); cookie = dmaengine_submit(desc);
dma_async_issue_pending(channel); dma_async_issue_pending(channel);
return 0; return 0;
@ -203,7 +203,7 @@ static void hash_dma_done(struct hash_ctx *ctx)
struct dma_chan *chan; struct dma_chan *chan;
chan = ctx->device->dma.chan_mem2hash; chan = ctx->device->dma.chan_mem2hash;
chan->device->device_control(chan, DMA_TERMINATE_ALL, 0); dmaengine_device_control(chan, DMA_TERMINATE_ALL, 0);
dma_unmap_sg(chan->device->dev, ctx->device->dma.sg, dma_unmap_sg(chan->device->dev, ctx->device->dma.sg,
ctx->device->dma.sg_len, DMA_TO_DEVICE); ctx->device->dma.sg_len, DMA_TO_DEVICE);
@ -473,12 +473,12 @@ static void hash_hw_write_key(struct hash_device_data *device_data,
HASH_SET_DIN(&word, nwords); HASH_SET_DIN(&word, nwords);
} }
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
HASH_SET_DCAL; HASH_SET_DCAL;
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
} }
@ -661,7 +661,7 @@ static void hash_messagepad(struct hash_device_data *device_data,
if (index_bytes) if (index_bytes)
HASH_SET_DIN(message, nwords); HASH_SET_DIN(message, nwords);
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
/* num_of_bytes == 0 => NBLW <- 0 (32 bits valid in DATAIN) */ /* num_of_bytes == 0 => NBLW <- 0 (32 bits valid in DATAIN) */
@ -676,7 +676,7 @@ static void hash_messagepad(struct hash_device_data *device_data,
(int)(readl_relaxed(&device_data->base->str) & (int)(readl_relaxed(&device_data->base->str) &
HASH_STR_NBLW_MASK)); HASH_STR_NBLW_MASK));
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
} }
@ -776,7 +776,7 @@ void hash_begin(struct hash_device_data *device_data, struct hash_ctx *ctx)
/* HW and SW initializations */ /* HW and SW initializations */
/* Note: there is no need to initialize buffer and digest members */ /* Note: there is no need to initialize buffer and digest members */
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
/* /*
@ -792,8 +792,7 @@ void hash_begin(struct hash_device_data *device_data, struct hash_ctx *ctx)
HASH_CLEAR_BITS(&device_data->base->str, HASH_STR_NBLW_MASK); HASH_CLEAR_BITS(&device_data->base->str, HASH_STR_NBLW_MASK);
} }
int hash_process_data( static int hash_process_data(struct hash_device_data *device_data,
struct hash_device_data *device_data,
struct hash_ctx *ctx, struct hash_req_ctx *req_ctx, struct hash_ctx *ctx, struct hash_req_ctx *req_ctx,
int msg_length, u8 *data_buffer, u8 *buffer, u8 *index) int msg_length, u8 *data_buffer, u8 *buffer, u8 *index)
{ {
@ -962,7 +961,7 @@ static int hash_dma_final(struct ahash_request *req)
wait_for_completion(&ctx->device->dma.complete); wait_for_completion(&ctx->device->dma.complete);
hash_dma_done(ctx); hash_dma_done(ctx);
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
if (ctx->config.oper_mode == HASH_OPER_MODE_HMAC && ctx->key) { if (ctx->config.oper_mode == HASH_OPER_MODE_HMAC && ctx->key) {
@ -992,7 +991,7 @@ out:
* hash_hw_final - The final hash calculation function * hash_hw_final - The final hash calculation function
* @req: The hash request for the job. * @req: The hash request for the job.
*/ */
int hash_hw_final(struct ahash_request *req) static int hash_hw_final(struct ahash_request *req)
{ {
int ret = 0; int ret = 0;
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
@ -1060,7 +1059,7 @@ int hash_hw_final(struct ahash_request *req)
req_ctx->state.index); req_ctx->state.index);
} else { } else {
HASH_SET_DCAL; HASH_SET_DCAL;
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
} }
@ -1189,7 +1188,7 @@ int hash_resume_state(struct hash_device_data *device_data,
temp_cr = device_state->temp_cr; temp_cr = device_state->temp_cr;
writel_relaxed(temp_cr & HASH_CR_RESUME_MASK, &device_data->base->cr); writel_relaxed(temp_cr & HASH_CR_RESUME_MASK, &device_data->base->cr);
if (device_data->base->cr & HASH_CR_MODE_MASK) if (readl(&device_data->base->cr) & HASH_CR_MODE_MASK)
hash_mode = HASH_OPER_MODE_HMAC; hash_mode = HASH_OPER_MODE_HMAC;
else else
hash_mode = HASH_OPER_MODE_HASH; hash_mode = HASH_OPER_MODE_HASH;
@ -1233,7 +1232,7 @@ int hash_save_state(struct hash_device_data *device_data,
* actually makes sure that there isn't any ongoing calculation in the * actually makes sure that there isn't any ongoing calculation in the
* hardware. * hardware.
*/ */
while (device_data->base->str & HASH_STR_DCAL_MASK) while (readl(&device_data->base->str) & HASH_STR_DCAL_MASK)
cpu_relax(); cpu_relax();
temp_cr = readl_relaxed(&device_data->base->cr); temp_cr = readl_relaxed(&device_data->base->cr);
@ -1242,7 +1241,7 @@ int hash_save_state(struct hash_device_data *device_data,
device_state->din_reg = readl_relaxed(&device_data->base->din); device_state->din_reg = readl_relaxed(&device_data->base->din);
if (device_data->base->cr & HASH_CR_MODE_MASK) if (readl(&device_data->base->cr) & HASH_CR_MODE_MASK)
hash_mode = HASH_OPER_MODE_HMAC; hash_mode = HASH_OPER_MODE_HMAC;
else else
hash_mode = HASH_OPER_MODE_HASH; hash_mode = HASH_OPER_MODE_HASH;

View File

@ -78,7 +78,7 @@ static int dma40_memcpy_channels[] = {
}; };
/* Default configuration for physcial memcpy */ /* Default configuration for physcial memcpy */
struct stedma40_chan_cfg dma40_memcpy_conf_phy = { static struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
.mode = STEDMA40_MODE_PHYSICAL, .mode = STEDMA40_MODE_PHYSICAL,
.dir = DMA_MEM_TO_MEM, .dir = DMA_MEM_TO_MEM,
@ -92,7 +92,7 @@ struct stedma40_chan_cfg dma40_memcpy_conf_phy = {
}; };
/* Default configuration for logical memcpy */ /* Default configuration for logical memcpy */
struct stedma40_chan_cfg dma40_memcpy_conf_log = { static struct stedma40_chan_cfg dma40_memcpy_conf_log = {
.mode = STEDMA40_MODE_LOGICAL, .mode = STEDMA40_MODE_LOGICAL,
.dir = DMA_MEM_TO_MEM, .dir = DMA_MEM_TO_MEM,
@ -3537,7 +3537,6 @@ static int __init d40_probe(struct platform_device *pdev)
{ {
struct stedma40_platform_data *plat_data = pdev->dev.platform_data; struct stedma40_platform_data *plat_data = pdev->dev.platform_data;
struct device_node *np = pdev->dev.of_node; struct device_node *np = pdev->dev.of_node;
int err;
int ret = -ENOENT; int ret = -ENOENT;
struct d40_base *base = NULL; struct d40_base *base = NULL;
struct resource *res = NULL; struct resource *res = NULL;
@ -3649,6 +3648,7 @@ static int __init d40_probe(struct platform_device *pdev)
base->lcpa_regulator = regulator_get(base->dev, "lcla_esram"); base->lcpa_regulator = regulator_get(base->dev, "lcla_esram");
if (IS_ERR(base->lcpa_regulator)) { if (IS_ERR(base->lcpa_regulator)) {
d40_err(&pdev->dev, "Failed to get lcpa_regulator\n"); d40_err(&pdev->dev, "Failed to get lcpa_regulator\n");
ret = PTR_ERR(base->lcpa_regulator);
base->lcpa_regulator = NULL; base->lcpa_regulator = NULL;
goto failure; goto failure;
} }
@ -3664,13 +3664,13 @@ static int __init d40_probe(struct platform_device *pdev)
} }
base->initialized = true; base->initialized = true;
err = d40_dmaengine_init(base, num_reserved_chans); ret = d40_dmaengine_init(base, num_reserved_chans);
if (err) if (ret)
goto failure; goto failure;
base->dev->dma_parms = &base->dma_parms; base->dev->dma_parms = &base->dma_parms;
err = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE); ret = dma_set_max_seg_size(base->dev, STEDMA40_MAX_SEG_SIZE);
if (err) { if (ret) {
d40_err(&pdev->dev, "Failed to set dma max seg size\n"); d40_err(&pdev->dev, "Failed to set dma max seg size\n");
goto failure; goto failure;
} }
@ -3678,8 +3678,8 @@ static int __init d40_probe(struct platform_device *pdev)
d40_hw_init(base); d40_hw_init(base);
if (np) { if (np) {
err = of_dma_controller_register(np, d40_xlate, NULL); ret = of_dma_controller_register(np, d40_xlate, NULL);
if (err && err != -ENODEV) if (ret)
dev_err(&pdev->dev, dev_err(&pdev->dev,
"could not register of_dma_controller\n"); "could not register of_dma_controller\n");
} }