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mtd: nand: pxa3xx: Allow to set/clear the 'spare enable' field

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Some commands (such as the ONFI parameter page read) need to
clear the 'spare enable' bit. This commit allows to set/clear
depending on the prepared command, instead of having it always
set.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Ezequiel Garcia 2013-08-12 14:14:49 -03:00 committed by David Woodhouse
parent cd9d11820f
commit 5bb653e890
1 changed files with 7 additions and 0 deletions
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7
drivers/mtd/nand/pxa3xx_nand.c
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@ -185,6 +185,7 @@ struct pxa3xx_nand_info {
int cs; int cs;
int use_ecc; /* use HW ECC ? */ int use_ecc; /* use HW ECC ? */
int use_dma; /* use DMA ? */ int use_dma; /* use DMA ? */
int use_spare; /* use spare ? */
int is_ready; int is_ready;
unsigned int page_size; /* page size of attached chip */ unsigned int page_size; /* page size of attached chip */
@ -325,6 +326,11 @@ static void pxa3xx_nand_start(struct pxa3xx_nand_info *info)
else else
ndcr &= ~NDCR_DMA_EN; ndcr &= ~NDCR_DMA_EN;
if (info->use_spare)
ndcr |= NDCR_SPARE_EN;
else
ndcr &= ~NDCR_SPARE_EN;
ndcr |= NDCR_ND_RUN; ndcr |= NDCR_ND_RUN;
/* clear status bits and run */ /* clear status bits and run */
@ -526,6 +532,7 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command,
info->buf_count = 0; info->buf_count = 0;
info->oob_size = 0; info->oob_size = 0;
info->use_ecc = 0; info->use_ecc = 0;
info->use_spare = 1;
info->use_dma = (use_dma) ? 1 : 0; info->use_dma = (use_dma) ? 1 : 0;
info->is_ready = 0; info->is_ready = 0;
info->retcode = ERR_NONE; info->retcode = ERR_NONE;