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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-16 17:23:55 +08:00

staging: dwc2: add platform device bindings

This adds a dwc_platform.ko module that can be loaded by using
compatible = "snps,dwc2" in a device tree.

Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Matthijs Kooijman 2013-04-22 14:00:19 -07:00 committed by Greg Kroah-Hartman
parent 7902c16b9a
commit 5b9974b13e
5 changed files with 167 additions and 2 deletions

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@ -0,0 +1,15 @@
Platform DesignWare HS OTG USB 2.0 controller
-----------------------------------------------------
Required properties:
- compatible : "snps,dwc2"
- reg : Should contain 1 register range (address and length)
- interrupts : Should contain 1 interrupt
Example:
usb@101c0000 {
compatible = "ralink,rt3050-usb, snps,dwc2";
reg = <0x101c0000 40000>;
interrupts = <18>;
};

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@ -8,9 +8,11 @@ config USB_DWC2
USB controller based on the DesignWare HSOTG IP Core. USB controller based on the DesignWare HSOTG IP Core.
If you choose to build this driver as dynamically linked If you choose to build this driver as dynamically linked
modules, the core module will be called dwc2.ko, and the modules, the core module will be called dwc2.ko, the
PCI bus interface module (if you have a PCI bus system) PCI bus interface module (if you have a PCI bus system)
will be called dwc2_pci.ko. will be called dwc2_pci.ko and the platform interface module
(for controllers directly connected to the CPU) will be called
dwc2_platform.ko.
NOTE: This driver at present only implements the Host mode NOTE: This driver at present only implements the Host mode
of the controller. The existing s3c-hsotg driver supports of the controller. The existing s3c-hsotg driver supports

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@ -19,5 +19,7 @@ dwc2-y += hcd_queue.o hcd_ddma.o
ifneq ($(CONFIG_PCI),) ifneq ($(CONFIG_PCI),)
obj-$(CONFIG_USB_DWC2) += dwc2_pci.o obj-$(CONFIG_USB_DWC2) += dwc2_pci.o
endif endif
obj-$(CONFIG_USB_DWC2) += dwc2_platform.o
dwc2_pci-y += pci.o dwc2_pci-y += pci.o
dwc2_platform-y += platform.o

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@ -2693,6 +2693,7 @@ void dwc2_set_all_params(struct dwc2_core_params *params, int value)
for (i = 0; i < size; i++) for (i = 0; i < size; i++)
p[i] = -1; p[i] = -1;
} }
EXPORT_SYMBOL_GPL(dwc2_set_all_params);
/* /*
* Initializes the HCD. This function allocates memory for and initializes the * Initializes the HCD. This function allocates memory for and initializes the

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@ -0,0 +1,145 @@
/*
* platform.c - DesignWare HS OTG Controller platform driver
*
* Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The names of the above-listed copyright holders may not be used
* to endorse or promote products derived from this software without
* specific prior written permission.
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation; either version 2 of the License, or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include "core.h"
#include "hcd.h"
static const char dwc2_driver_name[] = "dwc2";
/**
* dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
* DWC_otg driver
*
* @dev: Platform device
*
* This routine is called, for example, when the rmmod command is executed. The
* device may or may not be electrically present. If it is present, the driver
* stops device processing. Any resources used on behalf of this device are
* freed.
*/
static int dwc2_driver_remove(struct platform_device *dev)
{
struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
dwc2_hcd_remove(hsotg);
return 0;
}
/**
* dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
* driver
*
* @dev: Platform device
*
* This routine creates the driver components required to control the device
* (core, HCD, and PCD) and initializes the device. The driver components are
* stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
* in the device private data. This allows the driver to access the dwc2_hsotg
* structure on subsequent calls to driver methods for this device.
*/
static int dwc2_driver_probe(struct platform_device *dev)
{
struct dwc2_hsotg *hsotg;
struct resource *res;
int retval;
int irq;
struct dwc2_core_params params;
/* Default all params to autodetect */
dwc2_set_all_params(&params, -1);
hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
if (!hsotg)
return -ENOMEM;
hsotg->dev = &dev->dev;
irq = platform_get_irq(dev, 0);
if (irq < 0) {
dev_err(&dev->dev, "missing IRQ resource\n");
return -EINVAL;
}
res = platform_get_resource(dev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&dev->dev, "missing memory base resource\n");
return -EINVAL;
}
hsotg->regs = devm_ioremap_resource(&dev->dev, res);
if (IS_ERR(hsotg->regs))
return PTR_ERR(hsotg->regs);
dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
(unsigned long)res->start, hsotg->regs);
retval = dwc2_hcd_init(hsotg, irq, &params);
if (retval)
return retval;
platform_set_drvdata(dev, hsotg);
return retval;
}
static const struct of_device_id dwc2_of_match_table[] = {
{ .compatible = "snps,dwc2" },
{},
};
MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
static struct platform_driver dwc2_platform_driver = {
.driver = {
.name = (char *)dwc2_driver_name,
.of_match_table = dwc2_of_match_table,
},
.probe = dwc2_driver_probe,
.remove = dwc2_driver_remove,
};
module_platform_driver(dwc2_platform_driver);
MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
MODULE_LICENSE("Dual BSD/GPL");