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dmaengine: idxd: Update calculation of group offset to be more readable
Create helper macros to make group offset calculation more readable. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160407294683.839093.10740868559754142070.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -543,24 +543,22 @@ static void idxd_group_config_write(struct idxd_group *group)
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dev_dbg(dev, "Writing group %d cfg registers\n", group->id);
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/* setup GRPWQCFG */
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for (i = 0; i < 4; i++) {
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grpcfg_offset = idxd->grpcfg_offset +
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group->id * 64 + i * sizeof(u64);
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iowrite64(group->grpcfg.wqs[i],
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idxd->reg_base + grpcfg_offset);
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for (i = 0; i < GRPWQCFG_STRIDES; i++) {
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grpcfg_offset = GRPWQCFG_OFFSET(idxd, group->id, i);
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iowrite64(group->grpcfg.wqs[i], idxd->reg_base + grpcfg_offset);
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dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n",
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group->id, i, grpcfg_offset,
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ioread64(idxd->reg_base + grpcfg_offset));
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}
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/* setup GRPENGCFG */
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grpcfg_offset = idxd->grpcfg_offset + group->id * 64 + 32;
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grpcfg_offset = GRPENGCFG_OFFSET(idxd, group->id);
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iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset);
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dev_dbg(dev, "GRPCFG engs[%d: %#x]: %#llx\n", group->id,
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grpcfg_offset, ioread64(idxd->reg_base + grpcfg_offset));
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/* setup GRPFLAGS */
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grpcfg_offset = idxd->grpcfg_offset + group->id * 64 + 40;
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grpcfg_offset = GRPFLGCFG_OFFSET(idxd, group->id);
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iowrite32(group->grpcfg.flags.bits, idxd->reg_base + grpcfg_offset);
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dev_dbg(dev, "GRPFLAGS flags[%d: %#x]: %#x\n",
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group->id, grpcfg_offset,
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@ -356,4 +356,22 @@ union wqcfg {
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#define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))
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#define GRPCFG_SIZE 64
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#define GRPWQCFG_STRIDES 4
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/*
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* This macro calculates the offset into the GRPCFG register
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* idxd - struct idxd *
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* n - wq id
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* ofs - the index of the 32b dword for the config register
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*
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* The WQCFG register block is divided into groups per each wq. The n index
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* allows us to move to the register group that's for that particular wq.
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* Each register is 32bits. The ofs gives us the number of register to access.
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*/
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#define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
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(n) * GRPCFG_SIZE + sizeof(u64) * (ofs))
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#define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32)
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#define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40)
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#endif
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