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dt-bindings: drm/bridge: ti-sn65dsi86: Convert to yaml
This moves the bindings over, based a lot on toshiba,tc358768.yaml. Unless there's someone known to be better, I've set the maintainer in the yaml as the first person to submit bindings. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20200507143354.v5.4.Ifcdc4ecb12742a27862744ee1e8753cb95a38a7f@changeid
This commit is contained in:
Douglas Anderson
Sam Ravnborg
parent
27ed2b3f22
commit
5a2e9b658c
@ -1,87 +0,0 @@
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SN65DSI86 DSI to eDP bridge chip
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--------------------------------
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This is the binding for Texas Instruments SN65DSI86 bridge.
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http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
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Required properties:
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- compatible: Must be "ti,sn65dsi86"
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- reg: i2c address of the chip, 0x2d as per datasheet
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- enable-gpios: gpio specification for bridge_en pin (active high)
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- vccio-supply: A 1.8V supply that powers up the digital IOs.
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- vpll-supply: A 1.8V supply that powers up the displayport PLL.
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- vcca-supply: A 1.2V supply that powers up the analog circuits.
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- vcc-supply: A 1.2V supply that powers up the digital core.
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Optional properties:
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- interrupts-extended: Specifier for the SN65DSI86 interrupt line.
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- gpio-controller: Marks the device has a GPIO controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify flags.
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See ../../gpio/gpio.txt for more information.
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- #pwm-cells : Should be one. See ../../pwm/pwm.yaml for description of
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the cell formats.
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- clock-names: should be "refclk"
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- clocks: Specification for input reference clock. The reference
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clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
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- data-lanes: See ../../media/video-interface.txt
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- lane-polarities: See ../../media/video-interface.txt
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- suspend-gpios: specification for GPIO1 pin on bridge (active low)
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Required nodes:
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This device has two video ports. Their connections are modelled using the
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OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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- Video port 0 for DSI input
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- Video port 1 for eDP output
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Example
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-------
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edp-bridge@2d {
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compatible = "ti,sn65dsi86";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2d>;
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enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
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suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
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interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
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vccio-supply = <&pm8916_l17>;
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vcca-supply = <&pm8916_l6>;
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vpll-supply = <&pm8916_l17>;
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vcc-supply = <&pm8916_l6>;
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clock-names = "refclk";
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clocks = <&input_refclk>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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edp_bridge_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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port@1 {
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reg = <1>;
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edp_bridge_out: endpoint {
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data-lanes = <2 1 3 0>;
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lane-polarities = <0 1 0 1>;
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remote-endpoint = <&edp_panel_in>;
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};
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};
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};
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}
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@ -0,0 +1,285 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: SN65DSI86 DSI to eDP bridge chip
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maintainers:
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- Sandeep Panda <spanda@codeaurora.org>
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description: |
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The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
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http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
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properties:
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compatible:
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const: ti,sn65dsi86
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reg:
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const: 0x2d
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enable-gpios:
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maxItems: 1
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description: GPIO specifier for bridge_en pin (active high).
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suspend-gpios:
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maxItems: 1
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description: GPIO specifier for GPIO1 pin on bridge (active low).
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vccio-supply:
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description: A 1.8V supply that powers the digital IOs.
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vpll-supply:
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description: A 1.8V supply that powers the DisplayPort PLL.
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vcca-supply:
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description: A 1.2V supply that powers the analog circuits.
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vcc-supply:
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description: A 1.2V supply that powers the digital core.
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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description:
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Clock specifier for input reference clock. The reference clock rate must
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be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
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clock-names:
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const: refclk
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gpio-controller: true
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'#gpio-cells':
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const: 2
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description:
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First cell is pin number, second cell is flags. GPIO pin numbers are
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1-based to match the datasheet. See ../../gpio/gpio.txt for more
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information.
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'#pwm-cells':
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const: 1
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description: See ../../pwm/pwm.yaml for description of the cell formats.
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ports:
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type: object
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additionalProperties: false
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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port@0:
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type: object
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additionalProperties: false
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description:
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Video port for MIPI DSI input
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properties:
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reg:
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const: 0
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endpoint:
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type: object
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additionalProperties: false
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properties:
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remote-endpoint: true
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required:
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- reg
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port@1:
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type: object
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additionalProperties: false
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description:
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Video port for eDP output (panel or connector).
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properties:
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reg:
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const: 1
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endpoint:
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type: object
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additionalProperties: false
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properties:
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remote-endpoint: true
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data-lanes:
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oneOf:
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- minItems: 1
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maxItems: 1
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uniqueItems: true
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items:
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enum:
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- 0
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- 1
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description:
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If you have 1 logical lane the bridge supports routing
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to either port 0 or port 1. Port 0 is suggested.
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See ../../media/video-interface.txt for details.
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- minItems: 2
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maxItems: 2
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uniqueItems: true
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items:
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enum:
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- 0
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- 1
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description:
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If you have 2 logical lanes the bridge supports
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reordering but only on physical ports 0 and 1.
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See ../../media/video-interface.txt for details.
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- minItems: 4
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maxItems: 4
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uniqueItems: true
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items:
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enum:
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- 0
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- 1
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- 2
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- 3
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description:
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If you have 4 logical lanes the bridge supports
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reordering in any way.
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See ../../media/video-interface.txt for details.
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lane-polarities:
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minItems: 1
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maxItems: 4
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items:
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enum:
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- 0
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- 1
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description: See ../../media/video-interface.txt
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dependencies:
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lane-polarities: [data-lanes]
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required:
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- reg
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required:
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- "#address-cells"
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- "#size-cells"
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- enable-gpios
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- vccio-supply
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- vpll-supply
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- vcca-supply
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- vcc-supply
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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bridge@2d {
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compatible = "ti,sn65dsi86";
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reg = <0x2d>;
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interrupt-parent = <&tlmm>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
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vpll-supply = <&src_pp1800_s4a>;
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vccio-supply = <&src_pp1800_s4a>;
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vcca-supply = <&src_pp1200_l2a>;
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vcc-supply = <&src_pp1200_l2a>;
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clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
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clock-names = "refclk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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endpoint {
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remote-endpoint = <&dsi0_out>;
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};
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};
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port@1 {
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reg = <1>;
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endpoint {
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remote-endpoint = <&panel_in_edp>;
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};
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};
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};
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};
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};
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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bridge@2d {
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compatible = "ti,sn65dsi86";
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reg = <0x2d>;
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enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
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suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
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interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
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vccio-supply = <&pm8916_l17>;
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vcca-supply = <&pm8916_l6>;
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vpll-supply = <&pm8916_l17>;
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vcc-supply = <&pm8916_l6>;
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clock-names = "refclk";
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clocks = <&input_refclk>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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edp_bridge_in: endpoint {
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remote-endpoint = <&dsi_out>;
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};
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};
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port@1 {
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reg = <1>;
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edp_bridge_out: endpoint {
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data-lanes = <2 1 3 0>;
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lane-polarities = <0 1 0 1>;
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remote-endpoint = <&edp_panel_in>;
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};
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};
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};
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};
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};
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