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drm/i915: add HAS_FORCEWAKE flag to uncore
We have several cases where we don't have forcewake (older gens, GVT and planned display-only uncore), so, instead of checking every time against the various condition, save the info in a flag and use that. Note that this patch also change the behavior for gen5 with vpgu enabled, but this is not an issue since we don't support vgpu on gen5. v2: split out from previous path, fix check for missing case (Paulo) v3: Inline helper for clarity in testing flags Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190325214940.23632-3-daniele.ceraolospurio@intel.com
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@ -1391,7 +1391,7 @@ static void intel_uncore_fw_domains_init(struct intel_uncore *uncore)
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{
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struct drm_i915_private *i915 = uncore_to_i915(uncore);
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if (INTEL_GEN(i915) <= 5 || intel_vgpu_active(i915))
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if (!intel_uncore_has_forcewake(uncore))
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return;
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if (INTEL_GEN(i915) >= 11) {
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@ -1590,6 +1590,9 @@ int intel_uncore_init(struct intel_uncore *uncore)
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i915_check_vgpu(i915);
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if (INTEL_GEN(i915) > 5 && !intel_vgpu_active(i915))
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uncore->flags |= UNCORE_HAS_FORCEWAKE;
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intel_uncore_edram_detect(i915);
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intel_uncore_fw_domains_init(uncore);
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__intel_uncore_early_sanitize(uncore, 0);
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@ -1598,12 +1601,14 @@ int intel_uncore_init(struct intel_uncore *uncore)
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uncore->pmic_bus_access_nb.notifier_call =
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i915_pmic_bus_access_notifier;
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if (IS_GEN_RANGE(i915, 2, 4) || intel_vgpu_active(i915)) {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen2);
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen2);
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} else if (IS_GEN(i915, 5)) {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen5);
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen5);
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if (!intel_uncore_has_forcewake(uncore)) {
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if (IS_GEN(i915, 5)) {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen5);
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen5);
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} else {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen2);
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen2);
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}
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} else if (IS_GEN_RANGE(i915, 6, 7)) {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
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@ -1912,7 +1917,10 @@ intel_uncore_forcewake_for_read(struct drm_i915_private *dev_priv,
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} else if (INTEL_GEN(dev_priv) >= 6) {
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fw_domains = __gen6_reg_read_fw_domains(uncore, offset);
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} else {
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WARN_ON(!IS_GEN_RANGE(dev_priv, 2, 5));
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/* on devices with FW we expect to hit one of the above cases */
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if (intel_uncore_has_forcewake(uncore))
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MISSING_CASE(INTEL_GEN(dev_priv));
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fw_domains = 0;
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}
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@ -1938,7 +1946,10 @@ intel_uncore_forcewake_for_write(struct drm_i915_private *dev_priv,
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} else if (IS_GEN_RANGE(dev_priv, 6, 7)) {
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fw_domains = FORCEWAKE_RENDER;
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} else {
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WARN_ON(!IS_GEN_RANGE(dev_priv, 2, 5));
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/* on devices with FW we expect to hit one of the above cases */
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if (intel_uncore_has_forcewake(uncore))
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MISSING_CASE(INTEL_GEN(dev_priv));
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fw_domains = 0;
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}
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@ -1969,7 +1980,7 @@ intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
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WARN_ON(!op);
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if (intel_vgpu_active(dev_priv))
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if (!intel_uncore_has_forcewake(&dev_priv->uncore))
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return 0;
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if (op & FW_REG_READ)
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@ -97,6 +97,9 @@ struct intel_uncore {
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spinlock_t lock; /** lock is also taken in irq contexts. */
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unsigned int flags;
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#define UNCORE_HAS_FORCEWAKE BIT(0)
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const struct intel_forcewake_range *fw_domains_table;
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unsigned int fw_domains_table_entries;
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@ -143,6 +146,12 @@ forcewake_domain_to_uncore(const struct intel_uncore_forcewake_domain *d)
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return container_of(d, struct intel_uncore, fw_domain[d->id]);
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}
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static inline bool
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intel_uncore_has_forcewake(const struct intel_uncore *uncore)
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{
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return uncore->flags & UNCORE_HAS_FORCEWAKE;
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}
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void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
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int intel_uncore_init(struct intel_uncore *uncore);
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void intel_uncore_prune(struct intel_uncore *uncore);
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