mirror of
https://github.com/edk2-porting/linux-next.git
synced 2025-01-01 10:13:58 +08:00
PCI: pci-bridge-emul: Create per-bridge copy of register behavior
The behavior of the different registers of the PCI-to-PCI bridge is
currently encoded in two global arrays, shared by all instances of
PCI-to-PCI bridge emulation.
However, we will need to tweak the behavior on a per-bridge basis, to
accommodate for different capabilities of the platforms where this
code is used. In preparation for this, create a per-bridge copy of the
register behavior arrays, so that they can later be tweaked on a
per-bridge basis.
Fixes: 1f08673eef
("PCI: mvebu: Convert to PCI emulated bridge config space")
Reported-by: Luís Mendes <luis.p.mendes@gmail.com>
Reported-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Tested-by: Luis Mendes <luis.p.mendes@gmail.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Cc: Luís Mendes <luis.p.mendes@gmail.com>
Cc: Leigh Brown <leigh@solinno.co.uk>
This commit is contained in:
parent
bfeffd1552
commit
59f81c35e0
@ -24,29 +24,6 @@
|
|||||||
#define PCI_CAP_PCIE_START PCI_BRIDGE_CONF_END
|
#define PCI_CAP_PCIE_START PCI_BRIDGE_CONF_END
|
||||||
#define PCI_CAP_PCIE_END (PCI_CAP_PCIE_START + PCI_EXP_SLTSTA2 + 2)
|
#define PCI_CAP_PCIE_END (PCI_CAP_PCIE_START + PCI_EXP_SLTSTA2 + 2)
|
||||||
|
|
||||||
/*
|
|
||||||
* Initialize a pci_bridge_emul structure to represent a fake PCI
|
|
||||||
* bridge configuration space. The caller needs to have initialized
|
|
||||||
* the PCI configuration space with whatever values make sense
|
|
||||||
* (typically at least vendor, device, revision), the ->ops pointer,
|
|
||||||
* and optionally ->data and ->has_pcie.
|
|
||||||
*/
|
|
||||||
void pci_bridge_emul_init(struct pci_bridge_emul *bridge)
|
|
||||||
{
|
|
||||||
bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
|
|
||||||
bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
|
|
||||||
bridge->conf.cache_line_size = 0x10;
|
|
||||||
bridge->conf.status = PCI_STATUS_CAP_LIST;
|
|
||||||
|
|
||||||
if (bridge->has_pcie) {
|
|
||||||
bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
|
|
||||||
bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
|
|
||||||
/* Set PCIe v2, root port, slot support */
|
|
||||||
bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
|
|
||||||
PCI_EXP_FLAGS_SLOT;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
struct pci_bridge_reg_behavior {
|
struct pci_bridge_reg_behavior {
|
||||||
/* Read-only bits */
|
/* Read-only bits */
|
||||||
u32 ro;
|
u32 ro;
|
||||||
@ -283,6 +260,55 @@ const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Initialize a pci_bridge_emul structure to represent a fake PCI
|
||||||
|
* bridge configuration space. The caller needs to have initialized
|
||||||
|
* the PCI configuration space with whatever values make sense
|
||||||
|
* (typically at least vendor, device, revision), the ->ops pointer,
|
||||||
|
* and optionally ->data and ->has_pcie.
|
||||||
|
*/
|
||||||
|
int pci_bridge_emul_init(struct pci_bridge_emul *bridge)
|
||||||
|
{
|
||||||
|
bridge->conf.class_revision |= PCI_CLASS_BRIDGE_PCI << 16;
|
||||||
|
bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE;
|
||||||
|
bridge->conf.cache_line_size = 0x10;
|
||||||
|
bridge->conf.status = PCI_STATUS_CAP_LIST;
|
||||||
|
bridge->pci_regs_behavior = kmemdup(pci_regs_behavior,
|
||||||
|
sizeof(pci_regs_behavior),
|
||||||
|
GFP_KERNEL);
|
||||||
|
if (!bridge->pci_regs_behavior)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
if (bridge->has_pcie) {
|
||||||
|
bridge->conf.capabilities_pointer = PCI_CAP_PCIE_START;
|
||||||
|
bridge->pcie_conf.cap_id = PCI_CAP_ID_EXP;
|
||||||
|
/* Set PCIe v2, root port, slot support */
|
||||||
|
bridge->pcie_conf.cap = PCI_EXP_TYPE_ROOT_PORT << 4 | 2 |
|
||||||
|
PCI_EXP_FLAGS_SLOT;
|
||||||
|
bridge->pcie_cap_regs_behavior =
|
||||||
|
kmemdup(pcie_cap_regs_behavior,
|
||||||
|
sizeof(pcie_cap_regs_behavior),
|
||||||
|
GFP_KERNEL);
|
||||||
|
if (!bridge->pcie_cap_regs_behavior) {
|
||||||
|
kfree(bridge->pci_regs_behavior);
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Cleanup a pci_bridge_emul structure that was previously initilized
|
||||||
|
* using pci_bridge_emul_init().
|
||||||
|
*/
|
||||||
|
void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge)
|
||||||
|
{
|
||||||
|
if (bridge->has_pcie)
|
||||||
|
kfree(bridge->pcie_cap_regs_behavior);
|
||||||
|
kfree(bridge->pci_regs_behavior);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Should be called by the PCI controller driver when reading the PCI
|
* Should be called by the PCI controller driver when reading the PCI
|
||||||
* configuration space of the fake bridge. It will call back the
|
* configuration space of the fake bridge. It will call back the
|
||||||
@ -312,11 +338,11 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
|
|||||||
reg -= PCI_CAP_PCIE_START;
|
reg -= PCI_CAP_PCIE_START;
|
||||||
read_op = bridge->ops->read_pcie;
|
read_op = bridge->ops->read_pcie;
|
||||||
cfgspace = (u32 *) &bridge->pcie_conf;
|
cfgspace = (u32 *) &bridge->pcie_conf;
|
||||||
behavior = pcie_cap_regs_behavior;
|
behavior = bridge->pcie_cap_regs_behavior;
|
||||||
} else {
|
} else {
|
||||||
read_op = bridge->ops->read_base;
|
read_op = bridge->ops->read_base;
|
||||||
cfgspace = (u32 *) &bridge->conf;
|
cfgspace = (u32 *) &bridge->conf;
|
||||||
behavior = pci_regs_behavior;
|
behavior = bridge->pci_regs_behavior;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (read_op)
|
if (read_op)
|
||||||
@ -383,11 +409,11 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
|
|||||||
reg -= PCI_CAP_PCIE_START;
|
reg -= PCI_CAP_PCIE_START;
|
||||||
write_op = bridge->ops->write_pcie;
|
write_op = bridge->ops->write_pcie;
|
||||||
cfgspace = (u32 *) &bridge->pcie_conf;
|
cfgspace = (u32 *) &bridge->pcie_conf;
|
||||||
behavior = pcie_cap_regs_behavior;
|
behavior = bridge->pcie_cap_regs_behavior;
|
||||||
} else {
|
} else {
|
||||||
write_op = bridge->ops->write_base;
|
write_op = bridge->ops->write_base;
|
||||||
cfgspace = (u32 *) &bridge->conf;
|
cfgspace = (u32 *) &bridge->conf;
|
||||||
behavior = pci_regs_behavior;
|
behavior = bridge->pci_regs_behavior;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Keep all bits, except the RW bits */
|
/* Keep all bits, except the RW bits */
|
||||||
|
@ -107,15 +107,21 @@ struct pci_bridge_emul_ops {
|
|||||||
u32 old, u32 new, u32 mask);
|
u32 old, u32 new, u32 mask);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct pci_bridge_reg_behavior;
|
||||||
|
|
||||||
struct pci_bridge_emul {
|
struct pci_bridge_emul {
|
||||||
struct pci_bridge_emul_conf conf;
|
struct pci_bridge_emul_conf conf;
|
||||||
struct pci_bridge_emul_pcie_conf pcie_conf;
|
struct pci_bridge_emul_pcie_conf pcie_conf;
|
||||||
struct pci_bridge_emul_ops *ops;
|
struct pci_bridge_emul_ops *ops;
|
||||||
|
struct pci_bridge_reg_behavior *pci_regs_behavior;
|
||||||
|
struct pci_bridge_reg_behavior *pcie_cap_regs_behavior;
|
||||||
void *data;
|
void *data;
|
||||||
bool has_pcie;
|
bool has_pcie;
|
||||||
};
|
};
|
||||||
|
|
||||||
void pci_bridge_emul_init(struct pci_bridge_emul *bridge);
|
int pci_bridge_emul_init(struct pci_bridge_emul *bridge);
|
||||||
|
void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge);
|
||||||
|
|
||||||
int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
|
int pci_bridge_emul_conf_read(struct pci_bridge_emul *bridge, int where,
|
||||||
int size, u32 *value);
|
int size, u32 *value);
|
||||||
int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
|
int pci_bridge_emul_conf_write(struct pci_bridge_emul *bridge, int where,
|
||||||
|
Loading…
Reference in New Issue
Block a user