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drm: tilcdc: Replace drm_fb_get_bpp_depth() with drm_format_plane_cpp()

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The driver needs the number of bytes per pixel, not the bpp and depth
info meant for fbdev compatibility. Use the right API.

In the tilcdc_crtc_mode_set() function compute the hardware register
value directly from the pixel format instead of computing the number of
bits per pixels first.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1476744081-24485-7-git-send-email-laurent.pinchart@ideasonboard.com
This commit is contained in:
Laurent Pinchart 2016-10-18 01:41:14 +03:00 committed by Archit Taneja
parent ba0891d112
commit 59f11a4323
2 changed files with 12 additions and 13 deletions
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18
drivers/gpu/drm/tilcdc/tilcdc_crtc.c
View File

@ -72,16 +72,14 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct drm_gem_cma_object *gem; struct drm_gem_cma_object *gem;
unsigned int depth, bpp;
dma_addr_t start, end; dma_addr_t start, end;
u64 dma_base_and_ceiling; u64 dma_base_and_ceiling;
drm_fb_get_bpp_depth(fb->pixel_format, &depth, &bpp);
gem = drm_fb_cma_get_gem_obj(fb, 0); gem = drm_fb_cma_get_gem_obj(fb, 0);
start = gem->paddr + fb->offsets[0] + start = gem->paddr + fb->offsets[0] +
crtc->y * fb->pitches[0] + crtc->y * fb->pitches[0] +
crtc->x * bpp / 8; crtc->x * drm_format_plane_cpp(fb->pixel_format, 0);
end = start + (crtc->mode.vdisplay * fb->pitches[0]); end = start + (crtc->mode.vdisplay * fb->pitches[0]);
@ -461,16 +459,16 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
if (info->tft_alt_mode) if (info->tft_alt_mode)
reg |= LCDC_TFT_ALT_ENABLE; reg |= LCDC_TFT_ALT_ENABLE;
if (priv->rev == 2) { if (priv->rev == 2) {
unsigned int depth, bpp; switch (fb->pixel_format) {
case DRM_FORMAT_BGR565:
drm_fb_get_bpp_depth(fb->pixel_format, &depth, &bpp); case DRM_FORMAT_RGB565:
switch (bpp) {
case 16:
break; break;
case 32: case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_XRGB8888:
reg |= LCDC_V2_TFT_24BPP_UNPACK; reg |= LCDC_V2_TFT_24BPP_UNPACK;
/* fallthrough */ /* fallthrough */
case 24: case DRM_FORMAT_BGR888:
case DRM_FORMAT_RGB888:
reg |= LCDC_V2_TFT_24BPP_MODE; reg |= LCDC_V2_TFT_24BPP_MODE;
break; break;
default: default:

7
drivers/gpu/drm/tilcdc/tilcdc_plane.c
View File

@ -39,7 +39,7 @@ static int tilcdc_plane_atomic_check(struct drm_plane *plane,
{ {
struct drm_crtc_state *crtc_state; struct drm_crtc_state *crtc_state;
struct drm_plane_state *old_state = plane->state; struct drm_plane_state *old_state = plane->state;
unsigned int depth, bpp; unsigned int pitch;
if (!state->crtc) if (!state->crtc)
return 0; return 0;
@ -68,8 +68,9 @@ static int tilcdc_plane_atomic_check(struct drm_plane *plane,
return -EINVAL; return -EINVAL;
} }
drm_fb_get_bpp_depth(state->fb->pixel_format, &depth, &bpp); pitch = crtc_state->mode.hdisplay *
if (state->fb->pitches[0] != crtc_state->mode.hdisplay * bpp / 8) { drm_format_plane_cpp(state->fb->pixel_format, 0);
if (state->fb->pitches[0] != pitch) {
dev_err(plane->dev->dev, dev_err(plane->dev->dev,
"Invalid pitch: fb and crtc widths must be the same"); "Invalid pitch: fb and crtc widths must be the same");
return -EINVAL; return -EINVAL;