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b43: LP-PHY: Implement spec updates and remove resolved FIXMEs
Larry has started re-checking all current routines against a new version of the Broadcom MIPS driver. This patch implements the first round of changes he documented on the specs wiki. Also remove a few FIXMEs regarding missing initial values for variables with dynamic initial values where reading the values has been implemented. Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gábor Stefanik
John W. Linville
parent
16a832e785
commit
5904d20676
@ -724,9 +724,39 @@ static void lpphy_set_bb_mult(struct b43_wldev *dev, u8 bb_mult)
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b43_lptab_write(dev, B43_LPTAB16(0, 87), (u16)bb_mult << 8);
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}
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static void lpphy_disable_crs(struct b43_wldev *dev)
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static void lpphy_set_deaf(struct b43_wldev *dev, bool user)
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{
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struct b43_phy_lp *lpphy = dev->phy.lp;
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if (user)
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lpphy->crs_usr_disable = 1;
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else
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lpphy->crs_sys_disable = 1;
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b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x80);
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}
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static void lpphy_clear_deaf(struct b43_wldev *dev, bool user)
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{
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struct b43_phy_lp *lpphy = dev->phy.lp;
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if (user)
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lpphy->crs_usr_disable = 0;
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else
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lpphy->crs_sys_disable = 0;
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if (!lpphy->crs_usr_disable && !lpphy->crs_sys_disable) {
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
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b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL,
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0xFF1F, 0x60);
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else
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b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL,
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0xFF1F, 0x20);
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}
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}
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static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
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{
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lpphy_set_deaf(dev, user);
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b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x1);
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
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@ -754,12 +784,9 @@ static void lpphy_disable_crs(struct b43_wldev *dev)
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b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0x3FF);
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}
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static void lpphy_restore_crs(struct b43_wldev *dev)
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static void lpphy_restore_crs(struct b43_wldev *dev, bool user)
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{
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
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b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x60);
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else
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b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x20);
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lpphy_clear_deaf(dev, user);
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFF80);
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFC00);
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}
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@ -805,10 +832,11 @@ static void lpphy_set_tx_gains(struct b43_wldev *dev,
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b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
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0xF800, rf_gain);
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} else {
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pa_gain = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x7F00;
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pa_gain = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x1FC0;
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pa_gain <<= 2;
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b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
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(gains.pga << 8) | gains.gm);
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b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
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b43_phy_maskset(dev, B43_PHY_OFDM(0xFB),
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0x8000, gains.pad | pa_gain);
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b43_phy_write(dev, B43_PHY_OFDM(0xFC),
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(gains.pga << 8) | gains.gm);
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@ -822,7 +850,7 @@ static void lpphy_set_tx_gains(struct b43_wldev *dev,
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b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F, 1 << 7);
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b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF, 1 << 14);
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}
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b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFBF, 1 << 6);
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b43_phy_maskset(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF, 1 << 6);
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}
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static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain)
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@ -862,33 +890,33 @@ static void lpphy_rev2plus_set_rx_gain(struct b43_wldev *dev, u32 gain)
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}
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}
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static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
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static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
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{
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE);
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF);
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF);
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if (dev->phy.rev >= 2) {
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
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if (b43_current_band(dev->wl) != IEEE80211_BAND_2GHZ)
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return;
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF);
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFF7);
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b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7);
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}
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} else {
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b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF);
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}
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}
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static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
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static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
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{
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
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if (dev->phy.rev >= 2) {
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
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if (b43_current_band(dev->wl) != IEEE80211_BAND_2GHZ)
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return;
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if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x8);
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b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);
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}
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} else {
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b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);
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}
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@ -1007,26 +1035,22 @@ static u32 lpphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision)
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{
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u32 quotient, remainder, rbit, roundup, tmp;
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if (divisor == 0) {
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quotient = 0;
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remainder = 0;
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} else {
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if (divisor == 0)
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return 0;
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quotient = dividend / divisor;
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remainder = dividend % divisor;
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}
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rbit = divisor & 0x1;
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roundup = (divisor >> 1) + rbit;
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precision--;
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while (precision != 0xFF) {
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while (precision != 0) {
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tmp = remainder - roundup;
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quotient <<= 1;
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remainder <<= 1;
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if (remainder >= roundup) {
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if (remainder >= roundup)
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remainder = (tmp << 1) + rbit;
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quotient--;
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}
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else
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remainder <<= 1;
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precision--;
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}
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@ -1128,11 +1152,11 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
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struct b43_phy_lp *lpphy = dev->phy.lp;
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struct lpphy_iq_est iq_est;
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struct lpphy_tx_gains tx_gains;
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static const u32 ideal_pwr_table[22] = {
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static const u32 ideal_pwr_table[21] = {
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0x10000, 0x10557, 0x10e2d, 0x113e0, 0x10f22, 0x0ff64,
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0x0eda2, 0x0e5d4, 0x0efd1, 0x0fbe8, 0x0b7b8, 0x04b35,
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0x01a5e, 0x00a0b, 0x00444, 0x001fd, 0x000ff, 0x00088,
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0x0004c, 0x0002c, 0x0001a, 0xc0006,
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0x0004c, 0x0002c, 0x0001a,
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};
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bool old_txg_ovr;
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u8 old_bbmult;
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@ -1150,7 +1174,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
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"RC calib: Failed to switch to channel 7, error = %d",
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err);
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}
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old_txg_ovr = (b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) >> 6) & 1;
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old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40);
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old_bbmult = lpphy_get_bb_mult(dev);
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if (old_txg_ovr)
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tx_gains = lpphy_get_tx_gains(dev);
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@ -1165,7 +1189,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
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old_txpctl = lpphy->txpctl_mode;
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lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
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lpphy_disable_crs(dev);
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lpphy_disable_crs(dev, true);
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loopback = lpphy_loopback(dev);
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if (loopback == -1)
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goto finish;
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@ -1198,7 +1222,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
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lpphy_stop_ddfs(dev);
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finish:
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lpphy_restore_crs(dev);
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lpphy_restore_crs(dev, true);
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b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, old_rf_ovrval);
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b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, old_rf_ovr);
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b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, old_afe_ovrval);
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@ -825,11 +825,11 @@ struct b43_phy_lp {
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enum b43_lpphy_txpctl_mode txpctl_mode;
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/* Transmit isolation medium band */
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u8 tx_isolation_med_band; /* FIXME initial value? */
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u8 tx_isolation_med_band;
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/* Transmit isolation low band */
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u8 tx_isolation_low_band; /* FIXME initial value? */
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u8 tx_isolation_low_band;
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/* Transmit isolation high band */
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u8 tx_isolation_hi_band; /* FIXME initial value? */
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u8 tx_isolation_hi_band;
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/* Max transmit power medium band */
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u16 max_tx_pwr_med_band;
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@ -848,7 +848,7 @@ struct b43_phy_lp {
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s16 txpa[3], txpal[3], txpah[3];
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/* Receive power offset */
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u8 rx_pwr_offset; /* FIXME initial value? */
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u8 rx_pwr_offset;
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/* TSSI transmit count */
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u16 tssi_tx_count;
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@ -864,16 +864,16 @@ struct b43_phy_lp {
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s8 tx_pwr_idx_over; /* FIXME initial value? */
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/* RSSI vf */
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u8 rssi_vf; /* FIXME initial value? */
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u8 rssi_vf;
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/* RSSI vc */
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u8 rssi_vc; /* FIXME initial value? */
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u8 rssi_vc;
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/* RSSI gs */
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u8 rssi_gs; /* FIXME initial value? */
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u8 rssi_gs;
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/* RC cap */
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u8 rc_cap; /* FIXME initial value? */
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/* BX arch */
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u8 bx_arch; /* FIXME initial value? */
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u8 bx_arch;
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/* Full calibration channel */
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u8 full_calib_chan; /* FIXME initial value? */
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@ -885,6 +885,8 @@ struct b43_phy_lp {
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/* Used for "Save/Restore Dig Filt State" */
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u16 dig_flt_state[9];
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bool crs_usr_disable, crs_sys_disable;
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unsigned int pdiv;
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};
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@ -2367,7 +2367,17 @@ static void lpphy_rev2plus_write_gain_table(struct b43_wldev *dev, int offset,
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tmp = data.pad << 16;
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tmp |= data.pga << 8;
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tmp |= data.gm;
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tmp |= 0x7f000000;
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if (dev->phy.rev >= 3) {
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if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
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tmp |= 0x10 << 24;
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else
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tmp |= 0x70 << 24;
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} else {
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if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
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tmp |= 0x14 << 24;
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else
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tmp |= 0x7F << 24;
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}
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b43_lptab_write(dev, B43_LPTAB32(7, 0xC0 + offset), tmp);
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tmp = data.bb_mult << 20;
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tmp |= data.dac << 28;
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