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powerpc/mpc85xx: refactor the PM operations

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Freescale CoreNet-based and Non-CoreNet-based platforms require
different PM operations. This patch extracted existing PM operations
on Non-CoreNet-based platforms to a new file which can accommodate
both platforms. In this way, PM operation codes are clearer structurally.

Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@feescale.com>
Signed-off-by: Scott Wood <oss@buserror.net>
This commit is contained in:
chenhui zhao 2015-11-20 17:14:00 +08:00 committed by Scott Wood
parent d17799f9c1
commit 56f1ba2807
4 changed files with 127 additions and 54 deletions
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1
arch/powerpc/platforms/85xx/Makefile
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@ -2,6 +2,7 @@
# Makefile for the PowerPC 85xx linux kernel. # Makefile for the PowerPC 85xx linux kernel.
# #
obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_FSL_PMC) += mpc85xx_pm_ops.o
obj-y += common.o obj-y += common.o

106
arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c Normal file
View File

@ -0,0 +1,106 @@
/*
* MPC85xx PM operators
*
* Copyright 2015 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#define pr_fmt(fmt) "%s: " fmt, __func__
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/fsl/guts.h>
#include <asm/io.h>
#include <asm/fsl_pm.h>
static struct ccsr_guts __iomem *guts;
static void mpc85xx_irq_mask(int cpu)
{
}
static void mpc85xx_irq_unmask(int cpu)
{
}
static void mpc85xx_cpu_die(int cpu)
{
u32 tmp;
tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP;
mtspr(SPRN_HID0, tmp);
/* Enter NAP mode. */
tmp = mfmsr();
tmp |= MSR_WE;
asm volatile(
"msync\n"
"mtmsr %0\n"
"isync\n"
:
: "r" (tmp));
}
static void mpc85xx_cpu_up_prepare(int cpu)
{
}
static void mpc85xx_freeze_time_base(bool freeze)
{
uint32_t mask;
mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
if (freeze)
setbits32(&guts->devdisr, mask);
else
clrbits32(&guts->devdisr, mask);
in_be32(&guts->devdisr);
}
static const struct of_device_id mpc85xx_smp_guts_ids[] = {
{ .compatible = "fsl,mpc8572-guts", },
{ .compatible = "fsl,p1020-guts", },
{ .compatible = "fsl,p1021-guts", },
{ .compatible = "fsl,p1022-guts", },
{ .compatible = "fsl,p1023-guts", },
{ .compatible = "fsl,p2020-guts", },
{ .compatible = "fsl,bsc9132-guts", },
{},
};
static const struct fsl_pm_ops mpc85xx_pm_ops = {
.freeze_time_base = mpc85xx_freeze_time_base,
.irq_mask = mpc85xx_irq_mask,
.irq_unmask = mpc85xx_irq_unmask,
.cpu_die = mpc85xx_cpu_die,
.cpu_up_prepare = mpc85xx_cpu_up_prepare,
};
int __init mpc85xx_setup_pmc(void)
{
struct device_node *np;
np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids);
if (np) {
guts = of_iomap(np, 0);
of_node_put(np);
if (!guts) {
pr_err("Could not map guts node address\n");
return -ENOMEM;
}
}
qoriq_pm_ops = &mpc85xx_pm_ops;
return 0;
}

73
arch/powerpc/platforms/85xx/smp.c
View File

@ -2,7 +2,7 @@
* Author: Andy Fleming <afleming@freescale.com> * Author: Andy Fleming <afleming@freescale.com>
* Kumar Gala <galak@kernel.crashing.org> * Kumar Gala <galak@kernel.crashing.org>
* *
* Copyright 2006-2008, 2011-2012 Freescale Semiconductor Inc. * Copyright 2006-2008, 2011-2012, 2015 Freescale Semiconductor Inc.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
@ -15,7 +15,6 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_address.h>
#include <linux/kexec.h> #include <linux/kexec.h>
#include <linux/highmem.h> #include <linux/highmem.h>
#include <linux/cpu.h> #include <linux/cpu.h>
@ -29,6 +28,7 @@
#include <asm/dbell.h> #include <asm/dbell.h>
#include <asm/code-patching.h> #include <asm/code-patching.h>
#include <asm/cputhreads.h> #include <asm/cputhreads.h>
#include <asm/fsl_pm.h>
#include <sysdev/fsl_soc.h> #include <sysdev/fsl_soc.h>
#include <sysdev/mpic.h> #include <sysdev/mpic.h>
@ -43,24 +43,11 @@ struct epapr_spin_table {
u32 pir; u32 pir;
}; };
static struct ccsr_guts __iomem *guts; #ifdef CONFIG_HOTPLUG_CPU
static u64 timebase; static u64 timebase;
static int tb_req; static int tb_req;
static int tb_valid; static int tb_valid;
static void mpc85xx_timebase_freeze(int freeze)
{
uint32_t mask;
mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
if (freeze)
setbits32(&guts->devdisr, mask);
else
clrbits32(&guts->devdisr, mask);
in_be32(&guts->devdisr);
}
static void mpc85xx_give_timebase(void) static void mpc85xx_give_timebase(void)
{ {
unsigned long flags; unsigned long flags;
@ -71,7 +58,7 @@ static void mpc85xx_give_timebase(void)
barrier(); barrier();
tb_req = 0; tb_req = 0;
mpc85xx_timebase_freeze(1); qoriq_pm_ops->freeze_time_base(true);
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
/* /*
* e5500/e6500 have a workaround for erratum A-006958 in place * e5500/e6500 have a workaround for erratum A-006958 in place
@ -104,7 +91,7 @@ static void mpc85xx_give_timebase(void)
while (tb_valid) while (tb_valid)
barrier(); barrier();
mpc85xx_timebase_freeze(0); qoriq_pm_ops->freeze_time_base(false);
local_irq_restore(flags); local_irq_restore(flags);
} }
@ -126,31 +113,25 @@ static void mpc85xx_take_timebase(void)
local_irq_restore(flags); local_irq_restore(flags);
} }
#ifdef CONFIG_HOTPLUG_CPU
static void smp_85xx_mach_cpu_die(void) static void smp_85xx_mach_cpu_die(void)
{ {
unsigned int cpu = smp_processor_id(); unsigned int cpu = smp_processor_id();
u32 tmp;
local_irq_disable(); local_irq_disable();
hard_irq_disable();
/* mask all irqs to prevent cpu wakeup */
qoriq_pm_ops->irq_mask(cpu);
idle_task_exit(); idle_task_exit();
generic_set_cpu_dead(cpu);
mb();
mtspr(SPRN_TCR, 0); mtspr(SPRN_TCR, 0);
mtspr(SPRN_TSR, mfspr(SPRN_TSR));
generic_set_cpu_dead(cpu);
cur_cpu_spec->cpu_down_flush(); cur_cpu_spec->cpu_down_flush();
tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP; qoriq_pm_ops->cpu_die(cpu);
mtspr(SPRN_HID0, tmp);
isync();
/* Enter NAP mode. */
tmp = mfmsr();
tmp |= MSR_WE;
mb();
mtmsr(tmp);
isync();
while (1) while (1)
; ;
@ -468,16 +449,6 @@ static void smp_85xx_setup_cpu(int cpu_nr)
smp_85xx_basic_setup(cpu_nr); smp_85xx_basic_setup(cpu_nr);
} }
static const struct of_device_id mpc85xx_smp_guts_ids[] = {
{ .compatible = "fsl,mpc8572-guts", },
{ .compatible = "fsl,p1020-guts", },
{ .compatible = "fsl,p1021-guts", },
{ .compatible = "fsl,p1022-guts", },
{ .compatible = "fsl,p1023-guts", },
{ .compatible = "fsl,p2020-guts", },
{},
};
void __init mpc85xx_smp_init(void) void __init mpc85xx_smp_init(void)
{ {
struct device_node *np; struct device_node *np;
@ -501,22 +472,16 @@ void __init mpc85xx_smp_init(void)
smp_85xx_ops.probe = NULL; smp_85xx_ops.probe = NULL;
} }
np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids); #ifdef CONFIG_HOTPLUG_CPU
if (np) { #ifdef CONFIG_FSL_PMC
guts = of_iomap(np, 0); mpc85xx_setup_pmc();
of_node_put(np); #endif
if (!guts) { if (qoriq_pm_ops) {
pr_err("%s: Could not map guts node address\n",
__func__);
return;
}
smp_85xx_ops.give_timebase = mpc85xx_give_timebase; smp_85xx_ops.give_timebase = mpc85xx_give_timebase;
smp_85xx_ops.take_timebase = mpc85xx_take_timebase; smp_85xx_ops.take_timebase = mpc85xx_take_timebase;
#ifdef CONFIG_HOTPLUG_CPU
ppc_md.cpu_die = smp_85xx_mach_cpu_die; ppc_md.cpu_die = smp_85xx_mach_cpu_die;
#endif
} }
#endif
smp_ops = &smp_85xx_ops; smp_ops = &smp_85xx_ops;
#ifdef CONFIG_KEXEC #ifdef CONFIG_KEXEC

1
arch/powerpc/platforms/85xx/smp.h
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@ -5,6 +5,7 @@
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
void __init mpc85xx_smp_init(void); void __init mpc85xx_smp_init(void);
int __init mpc85xx_setup_pmc(void);
#else #else
static inline void mpc85xx_smp_init(void) static inline void mpc85xx_smp_init(void)
{ {