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powerpc: Modify macro ready for %r0 register change

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The assembler doesn't take %r0 register arguments in braces, so remove them.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Michael Neuling 2012-06-25 13:33:09 +00:00 committed by Benjamin Herrenschmidt
parent 82fff310f1
commit 564aa5cfd3
1 changed files with 9 additions and 9 deletions
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18
arch/powerpc/include/asm/ppc_asm.h
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@ -295,14 +295,14 @@ n:
*/ */
#ifdef __powerpc64__ #ifdef __powerpc64__
#define LOAD_REG_IMMEDIATE(reg,expr) \ #define LOAD_REG_IMMEDIATE(reg,expr) \
lis (reg),(expr)@highest; \ lis reg,(expr)@highest; \
ori (reg),(reg),(expr)@higher; \ ori reg,reg,(expr)@higher; \
rldicr (reg),(reg),32,31; \ rldicr reg,reg,32,31; \
oris (reg),(reg),(expr)@h; \ oris reg,reg,(expr)@h; \
ori (reg),(reg),(expr)@l; ori reg,reg,(expr)@l;
#define LOAD_REG_ADDR(reg,name) \ #define LOAD_REG_ADDR(reg,name) \
ld (reg),name@got(r2) ld reg,name@got(r2)
#define LOAD_REG_ADDRBASE(reg,name) LOAD_REG_ADDR(reg,name) #define LOAD_REG_ADDRBASE(reg,name) LOAD_REG_ADDR(reg,name)
#define ADDROFF(name) 0 #define ADDROFF(name) 0
@ -313,12 +313,12 @@ n:
#else /* 32-bit */ #else /* 32-bit */
#define LOAD_REG_IMMEDIATE(reg,expr) \ #define LOAD_REG_IMMEDIATE(reg,expr) \
lis (reg),(expr)@ha; \ lis reg,(expr)@ha; \
addi (reg),(reg),(expr)@l; addi reg,reg,(expr)@l;
#define LOAD_REG_ADDR(reg,name) LOAD_REG_IMMEDIATE(reg, name) #define LOAD_REG_ADDR(reg,name) LOAD_REG_IMMEDIATE(reg, name)
#define LOAD_REG_ADDRBASE(reg, name) lis (reg),name@ha #define LOAD_REG_ADDRBASE(reg, name) lis reg,name@ha
#define ADDROFF(name) name@l #define ADDROFF(name) name@l
/* offsets for stack frame layout */ /* offsets for stack frame layout */