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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-18 18:23:53 +08:00

dts: vt8500: Update serial nodes and disable by default in SoC files

Missing aliases for uarts on vt8500, wm8505, wm8650 added.
Nodes incorrectly labelled uart@.., changed to serial@... on all SoCs.
Set each uarts default status = "disabled" as they generally don't exist.

For each board file, we only need to enable uart0 as no other uarts are
physically present on any of these boards.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
This commit is contained in:
Tony Prisk 2013-04-23 14:23:26 +12:00
parent 4606c48051
commit 55954f8522
10 changed files with 84 additions and 22 deletions

View File

@ -30,3 +30,7 @@
};
};
};
&uart0 {
status = "okay";
};

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@ -21,6 +21,13 @@
};
};
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -121,32 +128,36 @@
reg = <0xd8050400 0x100>;
};
uart@d8200000 {
uart0: serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
status = "disabled";
};
uart@d82b0000 {
uart1: serial@d82b0000 {
compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>;
interrupts = <33>;
clocks = <&clkuart1>;
status = "disabled";
};
uart@d8210000 {
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
status = "disabled";
};
uart@d82c0000 {
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
status = "disabled";
};
rtc@d8100000 {

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@ -30,3 +30,7 @@
};
};
};
&uart0 {
status = "okay";
};

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@ -21,6 +21,15 @@
};
};
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -167,46 +176,52 @@
reg = <0xd8050400 0x100>;
};
uart@d8200000 {
uart0: serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
status = "disabled";
};
uart@d82b0000 {
uart1: serial@d82b0000 {
compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>;
interrupts = <33>;
clocks = <&clkuart1>;
status = "disabled";
};
uart@d8210000 {
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
status = "disabled";
};
uart@d82c0000 {
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
status = "disabled";
};
uart@d8370000 {
uart4: serial@d8370000 {
compatible = "via,vt8500-uart";
reg = <0xd8370000 0x1040>;
interrupts = <31>;
clocks = <&clkuart4>;
status = "disabled";
};
uart@d8380000 {
uart5: serial@d8380000 {
compatible = "via,vt8500-uart";
reg = <0xd8380000 0x1040>;
interrupts = <30>;
clocks = <&clkuart5>;
status = "disabled";
};
rtc@d8100000 {

View File

@ -32,3 +32,6 @@
};
};
&uart0 {
status = "okay";
};

View File

@ -21,6 +21,11 @@
};
};
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -150,18 +155,20 @@
reg = <0xd8050400 0x100>;
};
uart@d8200000 {
uart0: serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
status = "disabled";
};
uart@d82b0000 {
uart1: serial@d82b0000 {
compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>;
interrupts = <33>;
clocks = <&clkuart1>;
status = "disabled";
};
rtc@d8100000 {

View File

@ -24,3 +24,7 @@
wm,pull = <2>; /* pull-up */
};
};
&uart0 {
status = "okay";
};

View File

@ -258,46 +258,52 @@
interrupts = <26>;
};
uart0: uart@d8200000 {
uart0: serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
status = "disabled";
};
uart1: uart@d82b0000 {
uart1: serial@d82b0000 {
compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>;
interrupts = <33>;
clocks = <&clkuart1>;
status = "disabled";
};
uart2: uart@d8210000 {
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
status = "disabled";
};
uart3: uart@d82c0000 {
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
status = "disabled";
};
uart4: uart@d8370000 {
uart4: serial@d8370000 {
compatible = "via,vt8500-uart";
reg = <0xd8370000 0x1040>;
interrupts = <30>;
clocks = <&clkuart4>;
status = "disabled";
};
uart5: uart@d8380000 {
uart5: serial@d8380000 {
compatible = "via,vt8500-uart";
reg = <0xd8380000 0x1040>;
interrupts = <43>;
clocks = <&clkuart5>;
status = "disabled";
};
rtc@d8100000 {

View File

@ -41,3 +41,7 @@
};
};
};
&uart0 {
status = "okay";
};

View File

@ -189,32 +189,36 @@
interrupts = <26>;
};
uart0: uart@d8200000 {
uart0: serial@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
clocks = <&clkuart0>;
status = "disabled";
};
uart1: uart@d82b0000 {
uart1: serial@d82b0000 {
compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>;
interrupts = <33>;
clocks = <&clkuart1>;
status = "disabled";
};
uart2: uart@d8210000 {
uart2: serial@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
clocks = <&clkuart2>;
status = "disabled";
};
uart3: uart@d82c0000 {
uart3: serial@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
clocks = <&clkuart3>;
status = "disabled";
};
rtc@d8100000 {