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clk: renesas: r8a779{5|6|65}: Add TPU clock

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This patch adds the TPU clock on the R-Car r8a7795/r8a7796/r8a77965
SoCs.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Cao Van Dong 2019-04-25 10:25:13 +09:00 committed by Geert Uytterhoeven
parent a188339ca5
commit 54bbb66544
3 changed files with 3 additions and 0 deletions
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1
drivers/clk/renesas/r8a7795-cpg-mssr.c
View File

@ -138,6 +138,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
DEF_MOD("cmt2", 301, R8A7795_CLK_R), DEF_MOD("cmt2", 301, R8A7795_CLK_R),
DEF_MOD("cmt1", 302, R8A7795_CLK_R), DEF_MOD("cmt1", 302, R8A7795_CLK_R),
DEF_MOD("cmt0", 303, R8A7795_CLK_R), DEF_MOD("cmt0", 303, R8A7795_CLK_R),
DEF_MOD("tpu0", 304, R8A7795_CLK_S3D4),
DEF_MOD("scif2", 310, R8A7795_CLK_S3D4), DEF_MOD("scif2", 310, R8A7795_CLK_S3D4),
DEF_MOD("sdif3", 311, R8A7795_CLK_SD3), DEF_MOD("sdif3", 311, R8A7795_CLK_SD3),
DEF_MOD("sdif2", 312, R8A7795_CLK_SD2), DEF_MOD("sdif2", 312, R8A7795_CLK_SD2),

1
drivers/clk/renesas/r8a7796-cpg-mssr.c
View File

@ -134,6 +134,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
DEF_MOD("cmt2", 301, R8A7796_CLK_R), DEF_MOD("cmt2", 301, R8A7796_CLK_R),
DEF_MOD("cmt1", 302, R8A7796_CLK_R), DEF_MOD("cmt1", 302, R8A7796_CLK_R),
DEF_MOD("cmt0", 303, R8A7796_CLK_R), DEF_MOD("cmt0", 303, R8A7796_CLK_R),
DEF_MOD("tpu0", 304, R8A7796_CLK_S3D4),
DEF_MOD("scif2", 310, R8A7796_CLK_S3D4), DEF_MOD("scif2", 310, R8A7796_CLK_S3D4),
DEF_MOD("sdif3", 311, R8A7796_CLK_SD3), DEF_MOD("sdif3", 311, R8A7796_CLK_SD3),
DEF_MOD("sdif2", 312, R8A7796_CLK_SD2), DEF_MOD("sdif2", 312, R8A7796_CLK_SD2),

1
drivers/clk/renesas/r8a77965-cpg-mssr.c
View File

@ -132,6 +132,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
DEF_MOD("cmt2", 301, R8A77965_CLK_R), DEF_MOD("cmt2", 301, R8A77965_CLK_R),
DEF_MOD("cmt1", 302, R8A77965_CLK_R), DEF_MOD("cmt1", 302, R8A77965_CLK_R),
DEF_MOD("cmt0", 303, R8A77965_CLK_R), DEF_MOD("cmt0", 303, R8A77965_CLK_R),
DEF_MOD("tpu0", 304, R8A77965_CLK_S3D4),
DEF_MOD("scif2", 310, R8A77965_CLK_S3D4), DEF_MOD("scif2", 310, R8A77965_CLK_S3D4),
DEF_MOD("sdif3", 311, R8A77965_CLK_SD3), DEF_MOD("sdif3", 311, R8A77965_CLK_SD3),
DEF_MOD("sdif2", 312, R8A77965_CLK_SD2), DEF_MOD("sdif2", 312, R8A77965_CLK_SD2),