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spi/pl022: fix APB pclk power regression on U300
With the introduction of an AMBA PrimeCell per-cell block clock, the pclk was left on after probe() unless explicitly disabled. This clock is wired to the same clock on PL022 causing it to stay always on since. Fix this up properly by clocking the pclk whenever we want to write into any PL022 registers and clocking the external clock whenever we want to transmit messages on the bus. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Tested-by : Kevin Wells <wellsk40@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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@ -503,8 +503,9 @@ static void giveback(struct pl022 *pl022)
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msg->state = NULL;
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if (msg->complete)
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msg->complete(msg->context);
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/* This message is completed, so let's turn off the clock! */
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/* This message is completed, so let's turn off the clocks! */
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clk_disable(pl022->clk);
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amba_pclk_disable(pl022->adev);
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}
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/**
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@ -1139,9 +1140,10 @@ static void pump_messages(struct work_struct *work)
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/* Setup the SPI using the per chip configuration */
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pl022->cur_chip = spi_get_ctldata(pl022->cur_msg->spi);
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/*
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* We enable the clock here, then the clock will be disabled when
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* We enable the clocks here, then the clocks will be disabled when
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* giveback() is called in each method (poll/interrupt/DMA)
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*/
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amba_pclk_enable(pl022->adev);
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clk_enable(pl022->clk);
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restore_state(pl022);
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flush(pl022);
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@ -1786,11 +1788,9 @@ pl022_probe(struct amba_device *adev, struct amba_id *id)
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}
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/* Disable SSP */
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clk_enable(pl022->clk);
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writew((readw(SSP_CR1(pl022->virtbase)) & (~SSP_CR1_MASK_SSE)),
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SSP_CR1(pl022->virtbase));
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load_ssp_default_config(pl022);
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clk_disable(pl022->clk);
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status = request_irq(adev->irq[0], pl022_interrupt_handler, 0, "pl022",
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pl022);
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@ -1818,6 +1818,8 @@ pl022_probe(struct amba_device *adev, struct amba_id *id)
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goto err_spi_register;
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}
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dev_dbg(dev, "probe succeded\n");
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/* Disable the silicon block pclk and clock it when needed */
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amba_pclk_disable(adev);
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return 0;
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err_spi_register:
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@ -1879,9 +1881,9 @@ static int pl022_suspend(struct amba_device *adev, pm_message_t state)
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return status;
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}
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clk_enable(pl022->clk);
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amba_pclk_enable(adev);
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load_ssp_default_config(pl022);
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clk_disable(pl022->clk);
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amba_pclk_disable(adev);
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dev_dbg(&adev->dev, "suspended\n");
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return 0;
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}
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