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drm/i915: Unify unpin_work and mmio_work into flip_work, v2.
Rename intel_unpin_work to intel_flip_work and use it for mmio flips and unpinning. Use flip_queued_req to hold the wait request in the mmio case, and the vblank counter from intel_crtc_get_vblank_counter. MMIO flips get their own path through intel_finish_page_flip_mmio, handled on vblank. CS page flips go through *_cs. Changes since v1: - Clean up destinction between MMIO and CS flips. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1463490484-19540-7-git-send-email-maarten.lankhorst@linux.intel.com Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
This commit is contained in:
Maarten Lankhorst
parent
a2991414c4
commit
51cbaf010f
@ -607,10 +607,10 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
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for_each_intel_crtc(dev, crtc) {
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const char pipe = pipe_name(crtc->pipe);
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const char plane = plane_name(crtc->plane);
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struct intel_unpin_work *work;
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struct intel_flip_work *work;
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spin_lock_irq(&dev->event_lock);
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work = crtc->unpin_work;
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work = crtc->flip_work;
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if (work == NULL) {
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seq_printf(m, "No flip due on pipe %c (plane %c)\n",
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pipe, plane);
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@ -640,7 +640,7 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
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seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now %d\n",
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work->flip_queued_vblank,
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work->flip_ready_vblank,
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drm_crtc_vblank_count(&crtc->base));
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intel_crtc_get_vblank_counter(crtc));
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seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
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if (INTEL_INFO(dev)->gen >= 4)
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@ -1634,7 +1634,13 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
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static bool intel_pipe_handle_vblank(struct drm_i915_private *dev_priv,
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enum pipe pipe)
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{
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return drm_handle_vblank(dev_priv->dev, pipe);
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bool ret;
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ret = drm_handle_vblank(dev_priv->dev, pipe);
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if (ret)
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intel_finish_page_flip_mmio(dev_priv, pipe);
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return ret;
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}
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static void valleyview_pipestat_irq_ack(struct drm_i915_private *dev_priv,
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@ -1706,7 +1712,7 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
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intel_check_page_flip(dev_priv, pipe);
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if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV)
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intel_finish_page_flip(dev_priv, pipe);
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intel_finish_page_flip_cs(dev_priv, pipe);
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if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
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i9xx_pipe_crc_irq_handler(dev_priv, pipe);
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@ -2161,7 +2167,7 @@ static void ilk_display_irq_handler(struct drm_i915_private *dev_priv,
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/* plane/pipes map 1:1 on ilk+ */
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if (de_iir & DE_PLANE_FLIP_DONE(pipe))
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intel_finish_page_flip(dev_priv, pipe);
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intel_finish_page_flip_cs(dev_priv, pipe);
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}
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/* check event from PCH */
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@ -2206,7 +2212,7 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv,
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/* plane/pipes map 1:1 on ilk+ */
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if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe))
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intel_finish_page_flip(dev_priv, pipe);
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intel_finish_page_flip_cs(dev_priv, pipe);
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}
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/* check event from PCH */
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@ -2412,7 +2418,7 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
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flip_done &= GEN8_PIPE_PRIMARY_FLIP_DONE;
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if (flip_done)
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intel_finish_page_flip(dev_priv, pipe);
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intel_finish_page_flip_cs(dev_priv, pipe);
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if (iir & GEN8_PIPE_CDCLK_CRC_DONE)
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hsw_pipe_crc_irq_handler(dev_priv, pipe);
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@ -3990,7 +3996,7 @@ static bool i8xx_handle_vblank(struct drm_i915_private *dev_priv,
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if (I915_READ16(ISR) & flip_pending)
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goto check_page_flip;
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intel_finish_page_flip(dev_priv, pipe);
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intel_finish_page_flip_cs(dev_priv, pipe);
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return true;
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check_page_flip:
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@ -4179,7 +4185,7 @@ static bool i915_handle_vblank(struct drm_i915_private *dev_priv,
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if (I915_READ(ISR) & flip_pending)
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goto check_page_flip;
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intel_finish_page_flip(dev_priv, pipe);
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intel_finish_page_flip_cs(dev_priv, pipe);
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return true;
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check_page_flip:
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@ -48,6 +48,11 @@
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#include <linux/reservation.h>
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#include <linux/dma-buf.h>
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static bool is_mmio_work(struct intel_flip_work *work)
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{
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return work->mmio_work.func;
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}
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/* Primary plane formats for gen <= 3 */
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static const uint32_t i8xx_primary_formats[] = {
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DRM_FORMAT_C8,
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@ -3113,7 +3118,7 @@ static void intel_complete_page_flips(struct drm_i915_private *dev_priv)
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struct intel_crtc *crtc;
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for_each_intel_crtc(dev_priv->dev, crtc)
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intel_finish_page_flip(dev_priv, crtc->pipe);
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intel_finish_page_flip_cs(dev_priv, crtc->pipe);
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}
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static void intel_update_primary_planes(struct drm_device *dev)
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@ -3215,7 +3220,7 @@ static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
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return false;
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spin_lock_irq(&dev->event_lock);
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pending = to_intel_crtc(crtc)->unpin_work != NULL;
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pending = to_intel_crtc(crtc)->flip_work != NULL;
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spin_unlock_irq(&dev->event_lock);
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return pending;
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@ -3794,7 +3799,7 @@ bool intel_has_pending_fb_unpin(struct drm_device *dev)
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if (atomic_read(&crtc->unpin_work_count) == 0)
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continue;
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if (crtc->unpin_work)
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if (crtc->flip_work)
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intel_wait_for_vblank(dev, crtc->pipe);
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return true;
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@ -3806,9 +3811,9 @@ bool intel_has_pending_fb_unpin(struct drm_device *dev)
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static void page_flip_completed(struct intel_crtc *intel_crtc)
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{
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struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
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struct intel_unpin_work *work = intel_crtc->unpin_work;
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struct intel_flip_work *work = intel_crtc->flip_work;
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intel_crtc->unpin_work = NULL;
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intel_crtc->flip_work = NULL;
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if (work->event)
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drm_crtc_send_vblank_event(&intel_crtc->base, work->event);
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@ -3816,7 +3821,7 @@ static void page_flip_completed(struct intel_crtc *intel_crtc)
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drm_crtc_vblank_put(&intel_crtc->base);
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wake_up_all(&dev_priv->pending_flip_queue);
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queue_work(dev_priv->wq, &work->work);
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queue_work(dev_priv->wq, &work->unpin_work);
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trace_i915_flip_complete(intel_crtc->plane,
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work->pending_flip_obj);
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@ -3840,9 +3845,11 @@ static int intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
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if (ret == 0) {
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_flip_work *work;
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spin_lock_irq(&dev->event_lock);
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if (intel_crtc->unpin_work) {
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work = intel_crtc->flip_work;
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if (work && !is_mmio_work(work)) {
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WARN_ONCE(1, "Removing stuck page flip\n");
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page_flip_completed(intel_crtc);
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}
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@ -6225,7 +6232,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
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return;
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if (to_intel_plane_state(crtc->primary->state)->visible) {
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WARN_ON(intel_crtc->unpin_work);
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WARN_ON(intel_crtc->flip_work);
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intel_pre_disable_primary_noatomic(crtc);
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@ -10821,15 +10828,16 @@ static void intel_crtc_destroy(struct drm_crtc *crtc)
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{
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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struct intel_unpin_work *work;
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struct intel_flip_work *work;
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spin_lock_irq(&dev->event_lock);
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work = intel_crtc->unpin_work;
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intel_crtc->unpin_work = NULL;
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work = intel_crtc->flip_work;
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intel_crtc->flip_work = NULL;
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spin_unlock_irq(&dev->event_lock);
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if (work) {
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cancel_work_sync(&work->work);
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cancel_work_sync(&work->mmio_work);
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cancel_work_sync(&work->unpin_work);
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kfree(work);
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}
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@ -10840,12 +10848,15 @@ static void intel_crtc_destroy(struct drm_crtc *crtc)
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static void intel_unpin_work_fn(struct work_struct *__work)
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{
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struct intel_unpin_work *work =
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container_of(__work, struct intel_unpin_work, work);
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struct intel_flip_work *work =
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container_of(__work, struct intel_flip_work, unpin_work);
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struct intel_crtc *crtc = to_intel_crtc(work->crtc);
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struct drm_device *dev = crtc->base.dev;
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struct drm_plane *primary = crtc->base.primary;
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if (is_mmio_work(work))
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flush_work(&work->mmio_work);
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mutex_lock(&dev->struct_mutex);
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intel_unpin_fb_obj(work->old_fb, primary->state->rotation);
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drm_gem_object_unreference(&work->pending_flip_obj->base);
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@ -10870,15 +10881,13 @@ static bool g4x_flip_count_after_eq(u32 a, u32 b)
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return !((a - b) & 0x80000000);
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}
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static bool page_flip_finished(struct intel_crtc *crtc)
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static bool __pageflip_finished_cs(struct intel_crtc *crtc,
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struct intel_flip_work *work)
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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unsigned reset_counter;
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/* ensure that the unpin work is consistent wrt ->pending. */
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smp_rmb();
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reset_counter = i915_reset_counter(&dev_priv->gpu_error);
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if (crtc->reset_counter != reset_counter)
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return true;
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@ -10915,17 +10924,47 @@ static bool page_flip_finished(struct intel_crtc *crtc)
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* anyway, we don't really care.
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*/
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return (I915_READ(DSPSURFLIVE(crtc->plane)) & ~0xfff) ==
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crtc->unpin_work->gtt_offset &&
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crtc->flip_work->gtt_offset &&
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g4x_flip_count_after_eq(I915_READ(PIPE_FLIPCOUNT_G4X(crtc->pipe)),
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crtc->unpin_work->flip_count);
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crtc->flip_work->flip_count);
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}
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void intel_finish_page_flip(struct drm_i915_private *dev_priv, int pipe)
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static bool
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__pageflip_finished_mmio(struct intel_crtc *crtc,
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struct intel_flip_work *work)
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{
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/*
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* MMIO work completes when vblank is different from
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* flip_queued_vblank.
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*
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* Reset counter value doesn't matter, this is handled by
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* i915_wait_request finishing early, so no need to handle
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* reset here.
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*/
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return intel_crtc_get_vblank_counter(crtc) != work->flip_queued_vblank;
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}
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static bool pageflip_finished(struct intel_crtc *crtc,
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struct intel_flip_work *work)
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{
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if (!atomic_read(&work->pending))
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return false;
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smp_rmb();
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if (is_mmio_work(work))
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return __pageflip_finished_mmio(crtc, work);
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else
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return __pageflip_finished_cs(crtc, work);
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}
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void intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, int pipe)
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{
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struct drm_device *dev = dev_priv->dev;
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struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_unpin_work *work;
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struct intel_flip_work *work;
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unsigned long flags;
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/* Ignore early vblank irqs */
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@ -10937,18 +10976,48 @@ void intel_finish_page_flip(struct drm_i915_private *dev_priv, int pipe)
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* lost pageflips) so needs the full irqsave spinlocks.
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*/
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spin_lock_irqsave(&dev->event_lock, flags);
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work = intel_crtc->unpin_work;
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work = intel_crtc->flip_work;
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if (work != NULL &&
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atomic_read(&work->pending) &&
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page_flip_finished(intel_crtc))
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!is_mmio_work(work) &&
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pageflip_finished(intel_crtc, work))
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page_flip_completed(intel_crtc);
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spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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static inline void intel_mark_page_flip_active(struct intel_unpin_work *work)
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void intel_finish_page_flip_mmio(struct drm_i915_private *dev_priv, int pipe)
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{
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struct drm_device *dev = dev_priv->dev;
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struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_flip_work *work;
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unsigned long flags;
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/* Ignore early vblank irqs */
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if (!crtc)
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return;
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/*
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* This is called both by irq handlers and the reset code (to complete
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* lost pageflips) so needs the full irqsave spinlocks.
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*/
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spin_lock_irqsave(&dev->event_lock, flags);
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work = intel_crtc->flip_work;
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if (work != NULL &&
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is_mmio_work(work) &&
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pageflip_finished(intel_crtc, work))
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page_flip_completed(intel_crtc);
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spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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static inline void intel_mark_page_flip_active(struct intel_crtc *crtc,
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struct intel_flip_work *work)
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{
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work->flip_queued_vblank = intel_crtc_get_vblank_counter(crtc);
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/* Ensure that the work item is consistent when activating it ... */
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smp_mb__before_atomic();
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atomic_set(&work->pending, 1);
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@ -10982,7 +11051,7 @@ static int intel_gen2_queue_flip(struct drm_device *dev,
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intel_ring_emit(engine, MI_DISPLAY_FLIP |
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MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
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intel_ring_emit(engine, fb->pitches[0]);
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intel_ring_emit(engine, intel_crtc->unpin_work->gtt_offset);
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intel_ring_emit(engine, intel_crtc->flip_work->gtt_offset);
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intel_ring_emit(engine, 0); /* aux display base address, unused */
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return 0;
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@ -11013,7 +11082,7 @@ static int intel_gen3_queue_flip(struct drm_device *dev,
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intel_ring_emit(engine, MI_DISPLAY_FLIP_I915 |
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MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
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intel_ring_emit(engine, fb->pitches[0]);
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intel_ring_emit(engine, intel_crtc->unpin_work->gtt_offset);
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intel_ring_emit(engine, intel_crtc->flip_work->gtt_offset);
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intel_ring_emit(engine, MI_NOOP);
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return 0;
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@ -11043,7 +11112,7 @@ static int intel_gen4_queue_flip(struct drm_device *dev,
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intel_ring_emit(engine, MI_DISPLAY_FLIP |
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MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
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intel_ring_emit(engine, fb->pitches[0]);
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intel_ring_emit(engine, intel_crtc->unpin_work->gtt_offset |
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intel_ring_emit(engine, intel_crtc->flip_work->gtt_offset |
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obj->tiling_mode);
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/* XXX Enabling the panel-fitter across page-flip is so far
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@ -11077,7 +11146,7 @@ static int intel_gen6_queue_flip(struct drm_device *dev,
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intel_ring_emit(engine, MI_DISPLAY_FLIP |
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MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
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intel_ring_emit(engine, fb->pitches[0] | obj->tiling_mode);
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intel_ring_emit(engine, intel_crtc->unpin_work->gtt_offset);
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intel_ring_emit(engine, intel_crtc->flip_work->gtt_offset);
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/* Contrary to the suggestions in the documentation,
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* "Enable Panel Fitter" does not seem to be required when page
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@ -11180,7 +11249,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
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intel_ring_emit(engine, MI_DISPLAY_FLIP_I915 | plane_bit);
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intel_ring_emit(engine, (fb->pitches[0] | obj->tiling_mode));
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intel_ring_emit(engine, intel_crtc->unpin_work->gtt_offset);
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intel_ring_emit(engine, intel_crtc->flip_work->gtt_offset);
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intel_ring_emit(engine, (MI_NOOP));
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return 0;
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@ -11219,7 +11288,7 @@ static bool use_mmio_flip(struct intel_engine_cs *engine,
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static void skl_do_mmio_flip(struct intel_crtc *intel_crtc,
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unsigned int rotation,
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struct intel_unpin_work *work)
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struct intel_flip_work *work)
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{
|
||||
struct drm_device *dev = intel_crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
@ -11271,7 +11340,7 @@ static void skl_do_mmio_flip(struct intel_crtc *intel_crtc,
|
||||
}
|
||||
|
||||
static void ilk_do_mmio_flip(struct intel_crtc *intel_crtc,
|
||||
struct intel_unpin_work *work)
|
||||
struct intel_flip_work *work)
|
||||
{
|
||||
struct drm_device *dev = intel_crtc->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
@ -11294,48 +11363,20 @@ static void ilk_do_mmio_flip(struct intel_crtc *intel_crtc,
|
||||
POSTING_READ(DSPSURF(intel_crtc->plane));
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX: This is the temporary way to update the plane registers until we get
|
||||
* around to using the usual plane update functions for MMIO flips
|
||||
*/
|
||||
static void intel_do_mmio_flip(struct intel_mmio_flip *mmio_flip)
|
||||
static void intel_mmio_flip_work_func(struct work_struct *w)
|
||||
{
|
||||
struct intel_crtc *crtc = mmio_flip->crtc;
|
||||
struct intel_unpin_work *work;
|
||||
|
||||
spin_lock_irq(&crtc->base.dev->event_lock);
|
||||
work = crtc->unpin_work;
|
||||
spin_unlock_irq(&crtc->base.dev->event_lock);
|
||||
if (work == NULL)
|
||||
return;
|
||||
|
||||
intel_pipe_update_start(crtc);
|
||||
|
||||
if (INTEL_INFO(mmio_flip->i915)->gen >= 9)
|
||||
skl_do_mmio_flip(crtc, mmio_flip->rotation, work);
|
||||
else
|
||||
/* use_mmio_flip() retricts MMIO flips to ilk+ */
|
||||
ilk_do_mmio_flip(crtc, work);
|
||||
|
||||
intel_pipe_update_end(crtc);
|
||||
|
||||
intel_mark_page_flip_active(work);
|
||||
}
|
||||
|
||||
static void intel_mmio_flip_work_func(struct work_struct *work)
|
||||
{
|
||||
struct intel_mmio_flip *mmio_flip =
|
||||
container_of(work, struct intel_mmio_flip, work);
|
||||
struct intel_flip_work *work =
|
||||
container_of(w, struct intel_flip_work, mmio_work);
|
||||
struct intel_crtc *crtc = to_intel_crtc(work->crtc);
|
||||
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
|
||||
struct intel_framebuffer *intel_fb =
|
||||
to_intel_framebuffer(mmio_flip->crtc->base.primary->fb);
|
||||
to_intel_framebuffer(crtc->base.primary->fb);
|
||||
struct drm_i915_gem_object *obj = intel_fb->obj;
|
||||
|
||||
if (mmio_flip->req) {
|
||||
WARN_ON(__i915_wait_request(mmio_flip->req,
|
||||
if (work->flip_queued_req)
|
||||
WARN_ON(__i915_wait_request(work->flip_queued_req,
|
||||
false, NULL,
|
||||
&mmio_flip->i915->rps.mmioflips));
|
||||
i915_gem_request_unreference(mmio_flip->req);
|
||||
}
|
||||
&dev_priv->rps.mmioflips));
|
||||
|
||||
/* For framebuffer backed by dmabuf, wait for fence */
|
||||
if (obj->base.dma_buf)
|
||||
@ -11343,29 +11384,15 @@ static void intel_mmio_flip_work_func(struct work_struct *work)
|
||||
false, false,
|
||||
MAX_SCHEDULE_TIMEOUT) < 0);
|
||||
|
||||
intel_do_mmio_flip(mmio_flip);
|
||||
kfree(mmio_flip);
|
||||
}
|
||||
intel_pipe_update_start(crtc);
|
||||
|
||||
static int intel_queue_mmio_flip(struct drm_device *dev,
|
||||
struct drm_crtc *crtc,
|
||||
struct drm_i915_gem_object *obj)
|
||||
{
|
||||
struct intel_mmio_flip *mmio_flip;
|
||||
if (INTEL_GEN(dev_priv) >= 9)
|
||||
skl_do_mmio_flip(crtc, work->rotation, work);
|
||||
else
|
||||
/* use_mmio_flip() retricts MMIO flips to ilk+ */
|
||||
ilk_do_mmio_flip(crtc, work);
|
||||
|
||||
mmio_flip = kmalloc(sizeof(*mmio_flip), GFP_KERNEL);
|
||||
if (mmio_flip == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
mmio_flip->i915 = to_i915(dev);
|
||||
mmio_flip->req = i915_gem_request_reference(obj->last_write_req);
|
||||
mmio_flip->crtc = to_intel_crtc(crtc);
|
||||
mmio_flip->rotation = crtc->primary->state->rotation;
|
||||
|
||||
INIT_WORK(&mmio_flip->work, intel_mmio_flip_work_func);
|
||||
schedule_work(&mmio_flip->work);
|
||||
|
||||
return 0;
|
||||
intel_pipe_update_end(crtc, work);
|
||||
}
|
||||
|
||||
static int intel_default_queue_flip(struct drm_device *dev,
|
||||
@ -11378,36 +11405,32 @@ static int intel_default_queue_flip(struct drm_device *dev,
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static bool __intel_pageflip_stall_check(struct drm_device *dev,
|
||||
struct drm_crtc *crtc)
|
||||
static bool __pageflip_stall_check_cs(struct drm_i915_private *dev_priv,
|
||||
struct intel_crtc *intel_crtc,
|
||||
struct intel_flip_work *work)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
struct intel_unpin_work *work = intel_crtc->unpin_work;
|
||||
u32 addr;
|
||||
u32 pending;
|
||||
u32 addr, vblank;
|
||||
|
||||
pending = atomic_read(&work->pending);
|
||||
/* ensure that the unpin work is consistent wrt ->pending. */
|
||||
smp_rmb();
|
||||
|
||||
if (!pending)
|
||||
if (!atomic_read(&work->pending))
|
||||
return false;
|
||||
|
||||
smp_rmb();
|
||||
|
||||
vblank = intel_crtc_get_vblank_counter(intel_crtc);
|
||||
if (work->flip_ready_vblank == 0) {
|
||||
if (work->flip_queued_req &&
|
||||
!i915_gem_request_completed(work->flip_queued_req, true))
|
||||
return false;
|
||||
|
||||
work->flip_ready_vblank = drm_crtc_vblank_count(crtc);
|
||||
work->flip_ready_vblank = vblank;
|
||||
}
|
||||
|
||||
if (drm_crtc_vblank_count(crtc) - work->flip_ready_vblank < 3)
|
||||
if (vblank - work->flip_ready_vblank < 3)
|
||||
return false;
|
||||
|
||||
/* Potential stall - if we see that the flip has happened,
|
||||
* assume a missed interrupt. */
|
||||
if (INTEL_INFO(dev)->gen >= 4)
|
||||
if (INTEL_GEN(dev_priv) >= 4)
|
||||
addr = I915_HI_DISPBASE(I915_READ(DSPSURF(intel_crtc->plane)));
|
||||
else
|
||||
addr = I915_READ(DSPADDR(intel_crtc->plane));
|
||||
@ -11424,7 +11447,7 @@ void intel_check_page_flip(struct drm_i915_private *dev_priv, int pipe)
|
||||
struct drm_device *dev = dev_priv->dev;
|
||||
struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
struct intel_unpin_work *work;
|
||||
struct intel_flip_work *work;
|
||||
|
||||
WARN_ON(!in_interrupt());
|
||||
|
||||
@ -11432,15 +11455,19 @@ void intel_check_page_flip(struct drm_i915_private *dev_priv, int pipe)
|
||||
return;
|
||||
|
||||
spin_lock(&dev->event_lock);
|
||||
work = intel_crtc->unpin_work;
|
||||
if (work != NULL && __intel_pageflip_stall_check(dev, crtc)) {
|
||||
WARN_ONCE(1, "Kicking stuck page flip: queued at %d, now %d\n",
|
||||
work->flip_queued_vblank, drm_vblank_count(dev, pipe));
|
||||
work = intel_crtc->flip_work;
|
||||
|
||||
if (work != NULL && !is_mmio_work(work) &&
|
||||
__pageflip_stall_check_cs(dev_priv, intel_crtc, work)) {
|
||||
WARN_ONCE(1,
|
||||
"Kicking stuck page flip: queued at %d, now %d\n",
|
||||
work->flip_queued_vblank, intel_crtc_get_vblank_counter(intel_crtc));
|
||||
page_flip_completed(intel_crtc);
|
||||
work = NULL;
|
||||
}
|
||||
if (work != NULL &&
|
||||
drm_vblank_count(dev, pipe) - work->flip_queued_vblank > 1)
|
||||
|
||||
if (work != NULL && !is_mmio_work(work) &&
|
||||
intel_crtc_get_vblank_counter(intel_crtc) - work->flip_queued_vblank > 1)
|
||||
intel_queue_rps_boost_for_request(work->flip_queued_req);
|
||||
spin_unlock(&dev->event_lock);
|
||||
}
|
||||
@ -11457,7 +11484,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
struct drm_plane *primary = crtc->primary;
|
||||
enum pipe pipe = intel_crtc->pipe;
|
||||
struct intel_unpin_work *work;
|
||||
struct intel_flip_work *work;
|
||||
struct intel_engine_cs *engine;
|
||||
bool mmio_flip;
|
||||
struct drm_i915_gem_request *request = NULL;
|
||||
@ -11494,19 +11521,19 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
|
||||
work->event = event;
|
||||
work->crtc = crtc;
|
||||
work->old_fb = old_fb;
|
||||
INIT_WORK(&work->work, intel_unpin_work_fn);
|
||||
INIT_WORK(&work->unpin_work, intel_unpin_work_fn);
|
||||
|
||||
ret = drm_crtc_vblank_get(crtc);
|
||||
if (ret)
|
||||
goto free_work;
|
||||
|
||||
/* We borrow the event spin lock for protecting unpin_work */
|
||||
/* We borrow the event spin lock for protecting flip_work */
|
||||
spin_lock_irq(&dev->event_lock);
|
||||
if (intel_crtc->unpin_work) {
|
||||
if (intel_crtc->flip_work) {
|
||||
/* Before declaring the flip queue wedged, check if
|
||||
* the hardware completed the operation behind our backs.
|
||||
*/
|
||||
if (__intel_pageflip_stall_check(dev, crtc)) {
|
||||
if (pageflip_finished(intel_crtc, intel_crtc->flip_work)) {
|
||||
DRM_DEBUG_DRIVER("flip queue: previous flip completed, continuing\n");
|
||||
page_flip_completed(intel_crtc);
|
||||
} else {
|
||||
@ -11518,7 +11545,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
intel_crtc->unpin_work = work;
|
||||
intel_crtc->flip_work = work;
|
||||
spin_unlock_irq(&dev->event_lock);
|
||||
|
||||
if (atomic_read(&intel_crtc->unpin_work_count) >= 2)
|
||||
@ -11589,26 +11616,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
|
||||
work->gtt_offset = intel_plane_obj_offset(to_intel_plane(primary),
|
||||
obj, 0);
|
||||
work->gtt_offset += intel_crtc->dspaddr_offset;
|
||||
work->rotation = crtc->primary->state->rotation;
|
||||
|
||||
if (mmio_flip) {
|
||||
work->flip_queued_vblank = drm_crtc_vblank_count(crtc);
|
||||
INIT_WORK(&work->mmio_work, intel_mmio_flip_work_func);
|
||||
|
||||
i915_gem_request_assign(&work->flip_queued_req,
|
||||
obj->last_write_req);
|
||||
|
||||
ret = intel_queue_mmio_flip(dev, crtc, obj);
|
||||
if (ret)
|
||||
goto cleanup_unpin;
|
||||
schedule_work(&work->mmio_work);
|
||||
} else {
|
||||
i915_gem_request_assign(&work->flip_queued_req, request);
|
||||
ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,
|
||||
page_flip_flags);
|
||||
if (ret)
|
||||
goto cleanup_unpin;
|
||||
|
||||
i915_gem_request_assign(&work->flip_queued_req, request);
|
||||
|
||||
work->flip_queued_vblank = drm_crtc_vblank_count(crtc);
|
||||
intel_mark_page_flip_active(work);
|
||||
intel_mark_page_flip_active(intel_crtc, work);
|
||||
|
||||
i915_add_request_no_flush(request);
|
||||
}
|
||||
@ -11639,7 +11663,7 @@ cleanup:
|
||||
drm_framebuffer_unreference(work->old_fb);
|
||||
|
||||
spin_lock_irq(&dev->event_lock);
|
||||
intel_crtc->unpin_work = NULL;
|
||||
intel_crtc->flip_work = NULL;
|
||||
spin_unlock_irq(&dev->event_lock);
|
||||
|
||||
drm_crtc_vblank_put(crtc);
|
||||
@ -13935,7 +13959,7 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc,
|
||||
{
|
||||
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
|
||||
|
||||
intel_pipe_update_end(intel_crtc);
|
||||
intel_pipe_update_end(intel_crtc, NULL);
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@ -627,14 +627,6 @@ struct vlv_wm_state {
|
||||
bool cxsr;
|
||||
};
|
||||
|
||||
struct intel_mmio_flip {
|
||||
struct work_struct work;
|
||||
struct drm_i915_private *i915;
|
||||
struct drm_i915_gem_request *req;
|
||||
struct intel_crtc *crtc;
|
||||
unsigned int rotation;
|
||||
};
|
||||
|
||||
struct intel_crtc {
|
||||
struct drm_crtc base;
|
||||
enum pipe pipe;
|
||||
@ -649,7 +641,7 @@ struct intel_crtc {
|
||||
unsigned long enabled_power_domains;
|
||||
bool lowfreq_avail;
|
||||
struct intel_overlay *overlay;
|
||||
struct intel_unpin_work *unpin_work;
|
||||
struct intel_flip_work *flip_work;
|
||||
|
||||
atomic_t unpin_work_count;
|
||||
|
||||
@ -977,8 +969,10 @@ intel_get_crtc_for_plane(struct drm_device *dev, int plane)
|
||||
return dev_priv->plane_to_crtc_mapping[plane];
|
||||
}
|
||||
|
||||
struct intel_unpin_work {
|
||||
struct work_struct work;
|
||||
struct intel_flip_work {
|
||||
struct work_struct unpin_work;
|
||||
struct work_struct mmio_work;
|
||||
|
||||
struct drm_crtc *crtc;
|
||||
struct drm_framebuffer *old_fb;
|
||||
struct drm_i915_gem_object *pending_flip_obj;
|
||||
@ -989,6 +983,7 @@ struct intel_unpin_work {
|
||||
struct drm_i915_gem_request *flip_queued_req;
|
||||
u32 flip_queued_vblank;
|
||||
u32 flip_ready_vblank;
|
||||
unsigned int rotation;
|
||||
};
|
||||
|
||||
struct intel_load_detect_pipe {
|
||||
@ -1199,7 +1194,8 @@ struct drm_framebuffer *
|
||||
__intel_framebuffer_create(struct drm_device *dev,
|
||||
struct drm_mode_fb_cmd2 *mode_cmd,
|
||||
struct drm_i915_gem_object *obj);
|
||||
void intel_finish_page_flip(struct drm_i915_private *dev_priv, int pipe);
|
||||
void intel_finish_page_flip_cs(struct drm_i915_private *dev_priv, int pipe);
|
||||
void intel_finish_page_flip_mmio(struct drm_i915_private *dev_priv, int pipe);
|
||||
void intel_check_page_flip(struct drm_i915_private *dev_priv, int pipe);
|
||||
int intel_prepare_plane_fb(struct drm_plane *plane,
|
||||
const struct drm_plane_state *new_state);
|
||||
@ -1677,7 +1673,7 @@ int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
|
||||
int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
void intel_pipe_update_start(struct intel_crtc *crtc);
|
||||
void intel_pipe_update_end(struct intel_crtc *crtc);
|
||||
void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work);
|
||||
|
||||
/* intel_tv.c */
|
||||
void intel_tv_init(struct drm_device *dev);
|
||||
|
||||
@ -151,13 +151,19 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
|
||||
* re-enables interrupts and verifies the update was actually completed
|
||||
* before a vblank using the value of @start_vbl_count.
|
||||
*/
|
||||
void intel_pipe_update_end(struct intel_crtc *crtc)
|
||||
void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work)
|
||||
{
|
||||
enum pipe pipe = crtc->pipe;
|
||||
int scanline_end = intel_get_crtc_scanline(crtc);
|
||||
u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
|
||||
ktime_t end_vbl_time = ktime_get();
|
||||
|
||||
if (work) {
|
||||
work->flip_queued_vblank = end_vbl_count;
|
||||
smp_mb__before_atomic();
|
||||
atomic_set(&work->pending, 1);
|
||||
}
|
||||
|
||||
trace_i915_pipe_update_end(crtc, end_vbl_count, scanline_end);
|
||||
|
||||
local_irq_enable();
|
||||
|
||||
Loading…
Reference in New Issue
Block a user