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clk: berlin: add cpuclk
Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider fixed to 1. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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@ -45,7 +45,7 @@
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#define REG_SDIO0XIN_CLKCTL 0x0158
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#define REG_SDIO1XIN_CLKCTL 0x015c
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#define MAX_CLKS 27
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#define MAX_CLKS 28
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static struct clk *clks[MAX_CLKS];
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static struct clk_onecell_data clk_data;
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static DEFINE_SPINLOCK(lock);
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@ -356,13 +356,13 @@ static void __init berlin2q_clock_setup(struct device_node *np)
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gd->bit_idx, 0, &lock);
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}
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/*
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* twdclk is derived from cpu/3
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* TODO: use cpupll until cpuclk is not available
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*/
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/* cpuclk divider is fixed to 1 */
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clks[CLKID_CPU] =
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clk_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
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0, 1, 1);
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/* twdclk is derived from cpu/3 */
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clks[CLKID_TWD] =
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clk_register_fixed_factor(NULL, "twd", clk_names[CPUPLL],
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0, 1, 3);
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clk_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
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/* check for errors on leaf clocks */
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for (n = 0; n < MAX_CLKS; n++) {
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