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sfc: Remove efx_process_channel_now()
efx_process_channel_now() is unneeded since self-tests can rely on normal NAPI polling. Remove it and all calls to it. efx_channel::work_pending and efx_channel_processed() are also unneeded (the latter being the same as efx_nic_eventq_read_ack()). Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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8b8a95a11a
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514bedbc3a
@ -255,23 +255,6 @@ static int efx_process_channel(struct efx_channel *channel, int budget)
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return spent;
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}
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/* Mark channel as finished processing
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*
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* Note that since we will not receive further interrupts for this
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* channel before we finish processing and call the eventq_read_ack()
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* method, there is no need to use the interrupt hold-off timers.
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*/
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static inline void efx_channel_processed(struct efx_channel *channel)
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{
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/* The interrupt handler for this channel may set work_pending
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* as soon as we acknowledge the events we've seen. Make sure
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* it's cleared before then. */
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channel->work_pending = false;
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smp_wmb();
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efx_nic_eventq_read_ack(channel);
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}
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/* NAPI poll handler
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*
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* NAPI guarantees serialisation of polls of the same device, which
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@ -316,58 +299,16 @@ static int efx_poll(struct napi_struct *napi, int budget)
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/* There is no race here; although napi_disable() will
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* only wait for napi_complete(), this isn't a problem
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* since efx_channel_processed() will have no effect if
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* since efx_nic_eventq_read_ack() will have no effect if
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* interrupts have already been disabled.
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*/
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napi_complete(napi);
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efx_channel_processed(channel);
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efx_nic_eventq_read_ack(channel);
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}
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return spent;
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}
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/* Process the eventq of the specified channel immediately on this CPU
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*
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* Disable hardware generated interrupts, wait for any existing
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* processing to finish, then directly poll (and ack ) the eventq.
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* Finally reenable NAPI and interrupts.
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*
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* This is for use only during a loopback self-test. It must not
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* deliver any packets up the stack as this can result in deadlock.
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*/
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void efx_process_channel_now(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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BUG_ON(channel->channel >= efx->n_channels);
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BUG_ON(!channel->enabled);
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BUG_ON(!efx->loopback_selftest);
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/* Disable interrupts and wait for ISRs to complete */
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efx_nic_disable_interrupts(efx);
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if (efx->legacy_irq) {
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synchronize_irq(efx->legacy_irq);
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efx->legacy_irq_enabled = false;
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}
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if (channel->irq)
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synchronize_irq(channel->irq);
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/* Wait for any NAPI processing to complete */
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napi_disable(&channel->napi_str);
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/* Poll the channel */
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efx_process_channel(channel, channel->eventq_mask + 1);
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/* Ack the eventq. This may cause an interrupt to be generated
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* when they are reenabled */
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efx_channel_processed(channel);
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napi_enable(&channel->napi_str);
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if (efx->legacy_irq)
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efx->legacy_irq_enabled = true;
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efx_nic_enable_interrupts(efx);
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}
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/* Create event queue
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* Event queue memory allocations are done only once. If the channel
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* is reset, the memory buffer will be reused; this guards against
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@ -407,11 +348,7 @@ static void efx_start_eventq(struct efx_channel *channel)
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netif_dbg(channel->efx, ifup, channel->efx->net_dev,
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"chan %d start event queue\n", channel->channel);
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/* The interrupt handler for this channel may set work_pending
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* as soon as we enable it. Make sure it's cleared before
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* then. Similarly, make sure it sees the enabled flag set.
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*/
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channel->work_pending = false;
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/* Make sure the NAPI handler sees the enabled flag set */
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channel->enabled = true;
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smp_wmb();
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@ -109,7 +109,6 @@ static inline void efx_filter_rfs_expire(struct efx_channel *channel) {}
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/* Channels */
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extern int efx_channel_dummy_op_int(struct efx_channel *channel);
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extern void efx_channel_dummy_op_void(struct efx_channel *channel);
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extern void efx_process_channel_now(struct efx_channel *channel);
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extern int
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efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries);
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@ -155,7 +154,6 @@ static inline void efx_schedule_channel(struct efx_channel *channel)
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netif_vdbg(channel->efx, intr, channel->efx->net_dev,
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"channel %d scheduling NAPI poll on CPU%d\n",
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channel->channel, raw_smp_processor_id());
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channel->work_pending = true;
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napi_schedule(&channel->napi_str);
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}
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@ -361,7 +361,6 @@ enum efx_rx_alloc_method {
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* @irq_moderation: IRQ moderation value (in hardware ticks)
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* @napi_dev: Net device used with NAPI
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* @napi_str: NAPI control structure
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* @work_pending: Is work pending via NAPI?
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* @eventq: Event queue buffer
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* @eventq_mask: Event queue pointer mask
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* @eventq_read_ptr: Event queue read pointer
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@ -393,7 +392,6 @@ struct efx_channel {
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unsigned int irq_moderation;
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struct net_device *napi_dev;
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struct napi_struct napi_str;
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bool work_pending;
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struct efx_special_buffer eventq;
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unsigned int eventq_mask;
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unsigned int eventq_read_ptr;
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@ -447,14 +447,7 @@ static int efx_begin_loopback(struct efx_tx_queue *tx_queue)
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static int efx_poll_loopback(struct efx_nic *efx)
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{
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struct efx_loopback_state *state = efx->loopback_selftest;
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struct efx_channel *channel;
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/* NAPI polling is not enabled, so process channels
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* synchronously */
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efx_for_each_channel(channel, efx) {
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if (channel->work_pending)
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efx_process_channel_now(channel);
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}
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return atomic_read(&state->rx_good) == state->packet_count;
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}
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@ -586,10 +579,6 @@ static int efx_wait_for_link(struct efx_nic *efx)
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mutex_lock(&efx->mac_lock);
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efx->type->monitor(efx);
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mutex_unlock(&efx->mac_lock);
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} else {
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struct efx_channel *channel = efx_get_channel(efx, 0);
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if (channel->work_pending)
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efx_process_channel_now(channel);
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}
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mutex_lock(&efx->mac_lock);
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