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ASoC: da7213: add default clock handling
This adds default clock/PLL configuration to the driver for usage with generic drivers like simple-card for usage with a fixed rate clock. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Link: https://lore.kernel.org/r/20200626164623.87894-1-sebastian.reichel@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
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68d1abe186
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@ -1156,6 +1156,7 @@ static int da7213_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
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u8 dai_ctrl = 0;
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u8 fs;
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@ -1181,33 +1182,43 @@ static int da7213_hw_params(struct snd_pcm_substream *substream,
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switch (params_rate(params)) {
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case 8000:
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fs = DA7213_SR_8000;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
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break;
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case 11025:
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fs = DA7213_SR_11025;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
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break;
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case 12000:
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fs = DA7213_SR_12000;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
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break;
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case 16000:
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fs = DA7213_SR_16000;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
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break;
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case 22050:
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fs = DA7213_SR_22050;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
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break;
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case 32000:
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fs = DA7213_SR_32000;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
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break;
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case 44100:
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fs = DA7213_SR_44100;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
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break;
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case 48000:
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fs = DA7213_SR_48000;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
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break;
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case 88200:
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fs = DA7213_SR_88200;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_90316800;
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break;
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case 96000:
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fs = DA7213_SR_96000;
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da7213->out_rate = DA7213_PLL_FREQ_OUT_98304000;
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break;
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default:
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return -EINVAL;
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@ -1392,9 +1403,9 @@ static int da7213_set_component_sysclk(struct snd_soc_component *component,
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}
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/* Supported PLL input frequencies are 32KHz, 5MHz - 54MHz. */
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static int da7213_set_component_pll(struct snd_soc_component *component,
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int pll_id, int source,
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unsigned int fref, unsigned int fout)
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static int _da7213_set_component_pll(struct snd_soc_component *component,
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int pll_id, int source,
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unsigned int fref, unsigned int fout)
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{
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struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
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@ -1503,6 +1514,16 @@ static int da7213_set_component_pll(struct snd_soc_component *component,
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return 0;
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}
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static int da7213_set_component_pll(struct snd_soc_component *component,
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int pll_id, int source,
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unsigned int fref, unsigned int fout)
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{
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struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
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da7213->fixed_clk_auto_pll = false;
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return _da7213_set_component_pll(component, pll_id, source, fref, fout);
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}
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/* DAI operations */
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static const struct snd_soc_dai_ops da7213_dai_ops = {
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.hw_params = da7213_hw_params,
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@ -1532,6 +1553,50 @@ static struct snd_soc_dai_driver da7213_dai = {
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.symmetric_rates = 1,
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};
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static int da7213_set_auto_pll(struct snd_soc_component *component, bool enable)
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{
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struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
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int mode;
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if (!da7213->fixed_clk_auto_pll)
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return 0;
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da7213->mclk_rate = clk_get_rate(da7213->mclk);
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if (enable) {
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/* Slave mode needs SRM for non-harmonic frequencies */
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if (da7213->master)
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mode = DA7213_SYSCLK_PLL;
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else
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mode = DA7213_SYSCLK_PLL_SRM;
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/* PLL is not required for harmonic frequencies */
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switch (da7213->out_rate) {
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case DA7213_PLL_FREQ_OUT_90316800:
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if (da7213->mclk_rate == 11289600 ||
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da7213->mclk_rate == 22579200 ||
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da7213->mclk_rate == 45158400)
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mode = DA7213_SYSCLK_MCLK;
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break;
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case DA7213_PLL_FREQ_OUT_98304000:
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if (da7213->mclk_rate == 12288000 ||
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da7213->mclk_rate == 24576000 ||
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da7213->mclk_rate == 49152000)
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mode = DA7213_SYSCLK_MCLK;
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break;
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default:
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return -1;
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}
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} else {
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/* Disable PLL in standby */
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mode = DA7213_SYSCLK_MCLK;
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}
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return _da7213_set_component_pll(component, 0, mode,
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da7213->mclk_rate, da7213->out_rate);
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}
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static int da7213_set_bias_level(struct snd_soc_component *component,
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enum snd_soc_bias_level level)
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{
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@ -1551,6 +1616,8 @@ static int da7213_set_bias_level(struct snd_soc_component *component,
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"Failed to enable mclk\n");
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return ret;
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}
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da7213_set_auto_pll(component, true);
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}
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}
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break;
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@ -1562,8 +1629,10 @@ static int da7213_set_bias_level(struct snd_soc_component *component,
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DA7213_VMID_EN | DA7213_BIAS_EN);
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} else {
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/* Remove MCLK */
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if (da7213->mclk)
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if (da7213->mclk) {
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da7213_set_auto_pll(component, false);
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clk_disable_unprepare(da7213->mclk);
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}
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}
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break;
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case SND_SOC_BIAS_OFF:
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@ -1693,7 +1762,6 @@ static struct da7213_platform_data
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return pdata;
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}
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static int da7213_probe(struct snd_soc_component *component)
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{
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struct da7213_priv *da7213 = snd_soc_component_get_drvdata(component);
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@ -1829,6 +1897,11 @@ static int da7213_probe(struct snd_soc_component *component)
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return PTR_ERR(da7213->mclk);
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else
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da7213->mclk = NULL;
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} else {
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/* Do automatic PLL handling assuming fixed clock until
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* set_pll() has been called. This makes the codec usable
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* with the simple-audio-card driver. */
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da7213->fixed_clk_auto_pll = true;
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}
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return 0;
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@ -535,10 +535,12 @@ struct da7213_priv {
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struct regulator_bulk_data supplies[DA7213_NUM_SUPPLIES];
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struct clk *mclk;
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unsigned int mclk_rate;
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unsigned int out_rate;
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int clk_src;
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bool master;
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bool alc_calib_auto;
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bool alc_en;
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bool fixed_clk_auto_pll;
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struct da7213_platform_data *pdata;
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};
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