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ARM: dts: BCM63xx: Add ARMPLL device tree nodes
Add the ARM PLL controller which comes standard with the Cortex-A9 found on the BCM63138 SoCs. This is the same controller as the one found in the Broadcom iProc architecture, however, we have a separate compatible string to indicate the integration difference, since the hardware is different. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -43,18 +43,31 @@
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#address-cells = <1>;
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#size-cells = <0>;
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arm_timer_clk: arm_timer_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <500000000>;
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};
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/* UBUS peripheral clock */
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periph_clk: periph_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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clock-output-names = "periph";
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};
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/* peripheral clock for system timer */
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axi_clk: axi_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&armpll>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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/* APB bus clock */
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apb_clk: apb_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&armpll>;
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clock-div = <4>;
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clock-mult = <1>;
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};
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};
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/* ARM bus */
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@ -93,14 +106,14 @@
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x1e200 0x20>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&arm_timer_clk>;
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clocks = <&axi_clk>;
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};
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local_timer: local-timer@1e600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x1e600 0x20>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&arm_timer_clk>;
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clocks = <&axi_clk>;
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};
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twd_watchdog: watchdog@1e620 {
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@ -109,6 +122,13 @@
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interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
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};
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armpll: armpll {
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#clock-cells = <0>;
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compatible = "brcm,bcm63138-armpll";
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clocks = <&periph_clk>;
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reg = <0x20000 0xf00>;
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};
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pmb0: reset-controller@4800c0 {
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compatible = "brcm,bcm63138-pmb";
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reg = <0x4800c0 0x10>;
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