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perf: Remove type specific target pointers
The only reason CQM had to use a hard-coded pmu type was so it could use cqm_target in hw_perf_event. Do away with the {tp,bp,cqm}_target pointers and provide a non type specific one. This allows us to do away with that silly pmu type as well. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Vince Weaver <vince@deater.net> Cc: acme@kernel.org Cc: acme@redhat.com Cc: hpa@zytor.com Cc: jolsa@redhat.com Cc: kanaka.d.juvva@intel.com Cc: matt.fleming@intel.com Cc: tglx@linutronix.de Cc: torvalds@linux-foundation.org Cc: vikas.shivappa@linux.intel.com Link: http://lkml.kernel.org/r/20150305211019.GU21418@twins.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -648,7 +648,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
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* Per-cpu breakpoints are not supported by our stepping
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* mechanism.
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*/
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if (!bp->hw.bp_target)
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if (!bp->hw.target)
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return -EINVAL;
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/*
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@ -527,7 +527,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
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* Disallow per-task kernel breakpoints since these would
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* complicate the stepping code.
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*/
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if (info->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.bp_target)
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if (info->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target)
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return -EINVAL;
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return 0;
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@ -263,7 +263,7 @@ static bool __match_event(struct perf_event *a, struct perf_event *b)
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/*
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* Events that target same task are placed into the same cache group.
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*/
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if (a->hw.cqm_target == b->hw.cqm_target)
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if (a->hw.target == b->hw.target)
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return true;
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/*
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@ -279,7 +279,7 @@ static bool __match_event(struct perf_event *a, struct perf_event *b)
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static inline struct perf_cgroup *event_to_cgroup(struct perf_event *event)
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{
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if (event->attach_state & PERF_ATTACH_TASK)
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return perf_cgroup_from_task(event->hw.cqm_target);
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return perf_cgroup_from_task(event->hw.target);
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return event->cgrp;
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}
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@ -1365,8 +1365,7 @@ static int __init intel_cqm_init(void)
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__perf_cpu_notifier(intel_cqm_cpu_notifier);
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ret = perf_pmu_register(&intel_cqm_pmu, "intel_cqm",
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PERF_TYPE_INTEL_CQM);
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ret = perf_pmu_register(&intel_cqm_pmu, "intel_cqm", -1);
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if (ret)
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pr_err("Intel CQM perf registration failed: %d\n", ret);
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else
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@ -119,7 +119,6 @@ struct hw_perf_event {
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struct hrtimer hrtimer;
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};
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struct { /* tracepoint */
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struct task_struct *tp_target;
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/* for tp_event->class */
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struct list_head tp_list;
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};
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@ -129,7 +128,6 @@ struct hw_perf_event {
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struct list_head cqm_events_entry;
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struct list_head cqm_groups_entry;
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struct list_head cqm_group_entry;
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struct task_struct *cqm_target;
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};
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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struct { /* breakpoint */
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@ -138,12 +136,12 @@ struct hw_perf_event {
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* problem hw_breakpoint has with context
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* creation and event initalization.
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*/
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struct task_struct *bp_target;
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struct arch_hw_breakpoint info;
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struct list_head bp_list;
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};
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#endif
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};
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struct task_struct *target;
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int state;
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local64_t prev_count;
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u64 sample_period;
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@ -32,7 +32,6 @@ enum perf_type_id {
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PERF_TYPE_HW_CACHE = 3,
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PERF_TYPE_RAW = 4,
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PERF_TYPE_BREAKPOINT = 5,
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PERF_TYPE_INTEL_CQM = 6,
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PERF_TYPE_MAX, /* non-ABI */
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};
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@ -7171,18 +7171,12 @@ perf_event_alloc(struct perf_event_attr *attr, int cpu,
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if (task) {
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event->attach_state = PERF_ATTACH_TASK;
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if (attr->type == PERF_TYPE_TRACEPOINT)
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event->hw.tp_target = task;
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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/*
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* hw_breakpoint is a bit difficult here..
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* XXX pmu::event_init needs to know what task to account to
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* and we cannot use the ctx information because we need the
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* pmu before we get a ctx.
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*/
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else if (attr->type == PERF_TYPE_BREAKPOINT)
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event->hw.bp_target = task;
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#endif
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else if (attr->type == PERF_TYPE_INTEL_CQM)
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event->hw.cqm_target = task;
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event->hw.target = task;
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}
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if (!overflow_handler && parent_event) {
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@ -116,12 +116,12 @@ static unsigned int max_task_bp_pinned(int cpu, enum bp_type_idx type)
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*/
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static int task_bp_pinned(int cpu, struct perf_event *bp, enum bp_type_idx type)
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{
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struct task_struct *tsk = bp->hw.bp_target;
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struct task_struct *tsk = bp->hw.target;
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struct perf_event *iter;
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int count = 0;
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list_for_each_entry(iter, &bp_task_head, hw.bp_list) {
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if (iter->hw.bp_target == tsk &&
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if (iter->hw.target == tsk &&
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find_slot_idx(iter) == type &&
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(iter->cpu < 0 || cpu == iter->cpu))
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count += hw_breakpoint_weight(iter);
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@ -153,7 +153,7 @@ fetch_bp_busy_slots(struct bp_busy_slots *slots, struct perf_event *bp,
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int nr;
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nr = info->cpu_pinned;
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if (!bp->hw.bp_target)
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if (!bp->hw.target)
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nr += max_task_bp_pinned(cpu, type);
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else
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nr += task_bp_pinned(cpu, bp, type);
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@ -210,7 +210,7 @@ toggle_bp_slot(struct perf_event *bp, bool enable, enum bp_type_idx type,
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weight = -weight;
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/* Pinned counter cpu profiling */
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if (!bp->hw.bp_target) {
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if (!bp->hw.target) {
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get_bp_info(bp->cpu, type)->cpu_pinned += weight;
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return;
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}
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@ -1005,7 +1005,7 @@ __uprobe_perf_filter(struct trace_uprobe_filter *filter, struct mm_struct *mm)
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return true;
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list_for_each_entry(event, &filter->perf_events, hw.tp_list) {
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if (event->hw.tp_target->mm == mm)
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if (event->hw.target->mm == mm)
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return true;
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}
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@ -1015,7 +1015,7 @@ __uprobe_perf_filter(struct trace_uprobe_filter *filter, struct mm_struct *mm)
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static inline bool
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uprobe_filter_event(struct trace_uprobe *tu, struct perf_event *event)
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{
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return __uprobe_perf_filter(&tu->filter, event->hw.tp_target->mm);
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return __uprobe_perf_filter(&tu->filter, event->hw.target->mm);
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}
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static int uprobe_perf_close(struct trace_uprobe *tu, struct perf_event *event)
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@ -1023,10 +1023,10 @@ static int uprobe_perf_close(struct trace_uprobe *tu, struct perf_event *event)
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bool done;
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write_lock(&tu->filter.rwlock);
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if (event->hw.tp_target) {
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if (event->hw.target) {
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list_del(&event->hw.tp_list);
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done = tu->filter.nr_systemwide ||
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(event->hw.tp_target->flags & PF_EXITING) ||
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(event->hw.target->flags & PF_EXITING) ||
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uprobe_filter_event(tu, event);
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} else {
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tu->filter.nr_systemwide--;
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@ -1046,7 +1046,7 @@ static int uprobe_perf_open(struct trace_uprobe *tu, struct perf_event *event)
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int err;
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write_lock(&tu->filter.rwlock);
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if (event->hw.tp_target) {
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if (event->hw.target) {
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/*
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* event->parent != NULL means copy_process(), we can avoid
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* uprobe_apply(). current->mm must be probed and we can rely
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