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[POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC
Adding memory-controller and l2-cache-controller entries to be used by EDAC as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS. Also fixed up the size of the PCI node on MPC8560 ADS. Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -48,6 +48,22 @@
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reg = <e0000000 00100000>; // CCSRBAR 1M
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bus-frequency = <0>;
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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reg = <2000 1000>;
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interrupt-parent = <&mpic>;
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interrupts = <2 2>;
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};
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l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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reg = <20000 1000>;
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cache-line-size = <20>; // 32 bytes
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cache-size = <40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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interrupts = <0 2>;
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};
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i2c@3000 {
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device_type = "i2c";
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compatible = "fsl-i2c";
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@ -48,6 +48,22 @@
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reg = <e0000000 00100000>; // CCSRBAR 1M
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bus-frequency = <0>;
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memory-controller@2000 {
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compatible = "fsl,8548-memory-controller";
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reg = <2000 1000>;
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interrupt-parent = <&mpic>;
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interrupts = <2 2>;
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};
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l2-cache-controller@20000 {
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compatible = "fsl,8548-l2-cache-controller";
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reg = <20000 1000>;
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cache-line-size = <20>; // 32 bytes
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cache-size = <80000>; // L2, 512K
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interrupt-parent = <&mpic>;
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interrupts = <0 2>;
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};
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i2c@3000 {
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device_type = "i2c";
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compatible = "fsl-i2c";
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@ -48,6 +48,22 @@
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reg = <e0000000 00000200>;
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bus-frequency = <13ab6680>;
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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reg = <2000 1000>;
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interrupt-parent = <&mpic>;
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interrupts = <2 2>;
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};
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l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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reg = <20000 1000>;
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cache-line-size = <20>; // 32 bytes
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cache-size = <40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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interrupts = <0 2>;
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};
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mdio@24520 {
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device_type = "mdio";
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compatible = "gianfar";
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@ -110,7 +126,7 @@
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#address-cells = <3>;
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compatible = "85xx";
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device_type = "pci";
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reg = <8000 400>;
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reg = <8000 1000>;
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clock-frequency = <3f940aa>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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