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usb: gadget: lpc32xx_udc: move clock init to clock framework
Moves clock initialization to the clock framework. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Acked-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Alexandre Pereira da Silva
Felipe Balbi
parent
ba789170d2
commit
508566998b
@ -164,6 +164,7 @@ struct lpc32xx_udc {
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int udp_irq[4];
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struct clk *usb_pll_clk;
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struct clk *usb_slv_clk;
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struct clk *usb_otg_clk;
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/* DMA support */
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u32 *udca_v_base;
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@ -226,33 +227,15 @@ static inline struct lpc32xx_udc *to_udc(struct usb_gadget *g)
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#define UDCA_BUFF_SIZE (128)
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/* TODO: When the clock framework is introduced in LPC32xx, IO_ADDRESS will
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* be replaced with an inremap()ed pointer, see USB_OTG_CLK_CTRL()
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* be replaced with an inremap()ed pointer
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* */
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#define USB_CTRL IO_ADDRESS(LPC32XX_CLK_PM_BASE + 0x64)
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#define USB_CLOCK_MASK (AHB_M_CLOCK_ON | OTG_CLOCK_ON | \
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DEV_CLOCK_ON | I2C_CLOCK_ON)
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/* USB_CTRL bit defines */
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#define USB_SLAVE_HCLK_EN (1 << 24)
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#define USB_HOST_NEED_CLK_EN (1 << 21)
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#define USB_DEV_NEED_CLK_EN (1 << 22)
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#define USB_OTG_CLK_CTRL(udc) ((udc)->udp_baseaddr + 0xFF4)
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#define USB_OTG_CLK_STAT(udc) ((udc)->udp_baseaddr + 0xFF8)
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/* USB_OTG_CLK_CTRL bit defines */
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#define AHB_M_CLOCK_ON (1 << 4)
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#define OTG_CLOCK_ON (1 << 3)
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#define I2C_CLOCK_ON (1 << 2)
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#define DEV_CLOCK_ON (1 << 1)
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#define HOST_CLOCK_ON (1 << 0)
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#define USB_OTG_STAT_CONTROL(udc) (udc->udp_baseaddr + 0x110)
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/* USB_OTG_STAT_CONTROL bit defines */
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#define TRANSPARENT_I2C_EN (1 << 7)
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#define HOST_EN (1 << 0)
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/**********************************************************************
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* USB device controller register offsets
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**********************************************************************/
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@ -676,7 +659,7 @@ static void isp1301_udc_configure(struct lpc32xx_udc *udc)
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ISP1301_I2C_INTERRUPT_RISING, INT_VBUS_VLD);
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/* Enable usb_need_clk clock after transceiver is initialized */
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writel((readl(USB_CTRL) | (1 << 22)), USB_CTRL);
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writel((readl(USB_CTRL) | USB_DEV_NEED_CLK_EN), USB_CTRL);
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dev_info(udc->dev, "ISP1301 Vendor ID : 0x%04x\n",
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i2c_smbus_read_word_data(udc->isp1301_i2c_client, 0x00));
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@ -1009,11 +992,8 @@ static void udc_dd_free(struct lpc32xx_udc *udc, struct lpc32xx_usbd_dd_gad *dd)
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/* Enables or disables most of the USB system clocks when low power mode is
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* needed. Clocks are typically started on a connection event, and disabled
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* when a cable is disconnected */
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#define OTGOFF_CLK_MASK (AHB_M_CLOCK_ON | I2C_CLOCK_ON)
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static void udc_clk_set(struct lpc32xx_udc *udc, int enable)
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{
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int to = 1000;
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if (enable != 0) {
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if (udc->clocked)
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return;
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@ -1027,14 +1007,7 @@ static void udc_clk_set(struct lpc32xx_udc *udc, int enable)
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writel(readl(USB_CTRL) | USB_DEV_NEED_CLK_EN,
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USB_CTRL);
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/* Set to enable all needed USB OTG clocks */
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writel(USB_CLOCK_MASK, USB_OTG_CLK_CTRL(udc));
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while (((readl(USB_OTG_CLK_STAT(udc)) & USB_CLOCK_MASK) !=
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USB_CLOCK_MASK) && (to > 0))
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to--;
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if (!to)
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dev_dbg(udc->dev, "Cannot enable USB OTG clocking\n");
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clk_enable(udc->usb_otg_clk);
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} else {
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if (!udc->clocked)
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return;
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@ -1046,19 +1019,11 @@ static void udc_clk_set(struct lpc32xx_udc *udc, int enable)
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/* 48MHz PLL dpwn */
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clk_disable(udc->usb_pll_clk);
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/* Enable the USB device clock */
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/* Disable the USB device clock */
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writel(readl(USB_CTRL) & ~USB_DEV_NEED_CLK_EN,
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USB_CTRL);
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/* Set to enable all needed USB OTG clocks */
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writel(OTGOFF_CLK_MASK, USB_OTG_CLK_CTRL(udc));
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while (((readl(USB_OTG_CLK_STAT(udc)) &
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OTGOFF_CLK_MASK) !=
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OTGOFF_CLK_MASK) && (to > 0))
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to--;
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if (!to)
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dev_dbg(udc->dev, "Cannot disable USB OTG clocking\n");
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clk_disable(udc->usb_otg_clk);
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}
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}
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@ -3238,6 +3203,12 @@ static int __init lpc32xx_udc_probe(struct platform_device *pdev)
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retval = PTR_ERR(udc->usb_slv_clk);
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goto usb_clk_get_fail;
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}
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udc->usb_otg_clk = clk_get(&pdev->dev, "ck_usb_otg");
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if (IS_ERR(udc->usb_otg_clk)) {
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dev_err(udc->dev, "failed to acquire USB otg clock\n");
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retval = PTR_ERR(udc->usb_slv_clk);
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goto usb_otg_clk_get_fail;
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}
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/* Setup PLL clock to 48MHz */
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retval = clk_enable(udc->usb_pll_clk);
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@ -3261,15 +3232,12 @@ static int __init lpc32xx_udc_probe(struct platform_device *pdev)
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goto usb_clk_enable_fail;
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}
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/* Set to enable all needed USB OTG clocks */
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writel(USB_CLOCK_MASK, USB_OTG_CLK_CTRL(udc));
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i = 1000;
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while (((readl(USB_OTG_CLK_STAT(udc)) & USB_CLOCK_MASK) !=
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USB_CLOCK_MASK) && (i > 0))
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i--;
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if (!i)
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dev_dbg(udc->dev, "USB OTG clocks not correctly enabled\n");
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/* Enable USB OTG clock */
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retval = clk_enable(udc->usb_otg_clk);
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if (retval < 0) {
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dev_err(udc->dev, "failed to start USB otg clock\n");
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goto usb_otg_clk_enable_fail;
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}
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/* Setup deferred workqueue data */
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udc->poweron = udc->pullup = 0;
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@ -3389,12 +3357,16 @@ dma_alloc_fail:
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dma_free_coherent(&pdev->dev, UDCA_BUFF_SIZE,
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udc->udca_v_base, udc->udca_p_base);
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i2c_fail:
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clk_disable(udc->usb_otg_clk);
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usb_otg_clk_enable_fail:
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clk_disable(udc->usb_slv_clk);
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usb_clk_enable_fail:
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pll_set_fail:
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clk_disable(udc->usb_pll_clk);
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pll_enable_fail:
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clk_put(udc->usb_slv_clk);
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usb_otg_clk_get_fail:
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clk_put(udc->usb_otg_clk);
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usb_clk_get_fail:
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clk_put(udc->usb_pll_clk);
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pll_get_fail:
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@ -3432,6 +3404,8 @@ static int __devexit lpc32xx_udc_remove(struct platform_device *pdev)
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device_unregister(&udc->gadget.dev);
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clk_disable(udc->usb_otg_clk);
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clk_put(udc->usb_otg_clk);
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clk_disable(udc->usb_slv_clk);
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clk_put(udc->usb_slv_clk);
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clk_disable(udc->usb_pll_clk);
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@ -3445,7 +3419,6 @@ static int __devexit lpc32xx_udc_remove(struct platform_device *pdev)
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#ifdef CONFIG_PM
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static int lpc32xx_udc_suspend(struct platform_device *pdev, pm_message_t mesg)
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{
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int to = 1000;
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struct lpc32xx_udc *udc = platform_get_drvdata(pdev);
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if (udc->clocked) {
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@ -3460,15 +3433,6 @@ static int lpc32xx_udc_suspend(struct platform_device *pdev, pm_message_t mesg)
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on resume */
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udc->clocked = 1;
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/* Kill OTG and I2C clocks */
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writel(0, USB_OTG_CLK_CTRL(udc));
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while (((readl(USB_OTG_CLK_STAT(udc)) & OTGOFF_CLK_MASK) !=
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OTGOFF_CLK_MASK) && (to > 0))
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to--;
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if (!to)
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dev_dbg(udc->dev,
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"USB OTG clocks not correctly enabled\n");
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/* Kill global USB clock */
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clk_disable(udc->usb_slv_clk);
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}
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