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gpu: ipu-v3: Add ipu_idmac_lock_enable()

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Adds ipu_idmac_lock_enable(), which enables or disables channel
burst locking.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Steve Longerbeam 2014-06-25 18:05:45 -07:00 committed by Philipp Zabel
parent 2bcf577eb6
commit 4fd1a07af5
2 changed files with 70 additions and 0 deletions
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69
drivers/gpu/ipu-v3/ipu-common.c
View File

@ -305,6 +305,75 @@ void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,
}
EXPORT_SYMBOL_GPL(ipu_idmac_set_double_buffer);
static const struct {
int chnum;
u32 reg;
int shift;
} idmac_lock_en_info[] = {
{ .chnum = 5, .reg = IDMAC_CH_LOCK_EN_1, .shift = 0, },
{ .chnum = 11, .reg = IDMAC_CH_LOCK_EN_1, .shift = 2, },
{ .chnum = 12, .reg = IDMAC_CH_LOCK_EN_1, .shift = 4, },
{ .chnum = 14, .reg = IDMAC_CH_LOCK_EN_1, .shift = 6, },
{ .chnum = 15, .reg = IDMAC_CH_LOCK_EN_1, .shift = 8, },
{ .chnum = 20, .reg = IDMAC_CH_LOCK_EN_1, .shift = 10, },
{ .chnum = 21, .reg = IDMAC_CH_LOCK_EN_1, .shift = 12, },
{ .chnum = 22, .reg = IDMAC_CH_LOCK_EN_1, .shift = 14, },
{ .chnum = 23, .reg = IDMAC_CH_LOCK_EN_1, .shift = 16, },
{ .chnum = 27, .reg = IDMAC_CH_LOCK_EN_1, .shift = 18, },
{ .chnum = 28, .reg = IDMAC_CH_LOCK_EN_1, .shift = 20, },
{ .chnum = 45, .reg = IDMAC_CH_LOCK_EN_2, .shift = 0, },
{ .chnum = 46, .reg = IDMAC_CH_LOCK_EN_2, .shift = 2, },
{ .chnum = 47, .reg = IDMAC_CH_LOCK_EN_2, .shift = 4, },
{ .chnum = 48, .reg = IDMAC_CH_LOCK_EN_2, .shift = 6, },
{ .chnum = 49, .reg = IDMAC_CH_LOCK_EN_2, .shift = 8, },
{ .chnum = 50, .reg = IDMAC_CH_LOCK_EN_2, .shift = 10, },
};
int ipu_idmac_lock_enable(struct ipuv3_channel *channel, int num_bursts)
{
struct ipu_soc *ipu = channel->ipu;
unsigned long flags;
u32 bursts, regval;
int i;
switch (num_bursts) {
case 0:
case 1:
bursts = 0x00; /* locking disabled */
break;
case 2:
bursts = 0x01;
break;
case 4:
bursts = 0x02;
break;
case 8:
bursts = 0x03;
break;
default:
return -EINVAL;
}
for (i = 0; i < ARRAY_SIZE(idmac_lock_en_info); i++) {
if (channel->num == idmac_lock_en_info[i].chnum)
break;
}
if (i >= ARRAY_SIZE(idmac_lock_en_info))
return -EINVAL;
spin_lock_irqsave(&ipu->lock, flags);
regval = ipu_idmac_read(ipu, idmac_lock_en_info[i].reg);
regval &= ~(0x03 << idmac_lock_en_info[i].shift);
regval |= (bursts << idmac_lock_en_info[i].shift);
ipu_idmac_write(ipu, regval, idmac_lock_en_info[i].reg);
spin_unlock_irqrestore(&ipu->lock, flags);
return 0;
}
EXPORT_SYMBOL_GPL(ipu_idmac_lock_enable);
int ipu_module_enable(struct ipu_soc *ipu, u32 mask)
{
unsigned long lock_flags;

1
include/video/imx-ipu-v3.h
View File

@ -161,6 +161,7 @@ void ipu_idmac_put(struct ipuv3_channel *);
int ipu_idmac_enable_channel(struct ipuv3_channel *channel);
int ipu_idmac_disable_channel(struct ipuv3_channel *channel);
void ipu_idmac_enable_watermark(struct ipuv3_channel *channel, bool enable);
int ipu_idmac_lock_enable(struct ipuv3_channel *channel, int num_bursts);
int ipu_idmac_wait_busy(struct ipuv3_channel *channel, int ms);
void ipu_idmac_set_double_buffer(struct ipuv3_channel *channel,