renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-27 14:43:58 +08:00
Code

serial: 8250_lpss: Enable HS UART on Elkhart Lake

Browse Source 
Intel Elkhart Lake may use High Speed UART from OSE IP block.
This is different to what we have in main LPSS, though compatible
with older version of it, which is handled by this driver.

Enable OSE HS UART on Intel Elkhart Lake by adding PCI IDs.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Link: https://lore.kernel.org/r/20190806094322.64987-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Andy Shevchenko 2019-08-06 12:43:22 +03:00 committed by Greg Kroah-Hartman
parent d53aa935b7
commit 4f912b898d
1 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/tty/serial/8250/8250_lpss.c
View File

@ -24,6 +24,13 @@
#define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a
#define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c
#define PCI_DEVICE_ID_INTEL_EHL_UART0 0x4b96
#define PCI_DEVICE_ID_INTEL_EHL_UART1 0x4b97
#define PCI_DEVICE_ID_INTEL_EHL_UART2 0x4b98
#define PCI_DEVICE_ID_INTEL_EHL_UART3 0x4b99
#define PCI_DEVICE_ID_INTEL_EHL_UART4 0x4b9a
#define PCI_DEVICE_ID_INTEL_EHL_UART5 0x4b9b
#define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3
#define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4
@ -349,6 +356,11 @@ static const struct lpss8250_board byt_board = {
.setup = byt_serial_setup,
};
static const struct lpss8250_board ehl_board = {
.freq = 200000000,
.base_baud = 12500000,
};
static const struct lpss8250_board qrk_board = {
.freq = 44236800,
.base_baud = 2764800,
@ -358,6 +370,12 @@ static const struct lpss8250_board qrk_board = {
static const struct pci_device_id pci_ids[] = {
{ PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) },
{ PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) },
{ PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) },
{ PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) },
{ PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) },
{ PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) },
{ PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) },
{ PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) },
{ PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) },
{ PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) },