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net: phy: Cleanup the Edge-Rate feature in Microsemi PHYs.
Edge-Rate cleanup include the following: - Updated device tree bindings documentation for edge-rate - The edge-rate is now specified as a "slowdown", meaning that it is now being specified as positive values instead of negative (both documentation and implementation wise). - Only explicitly documented values for "vsc8531,vddmac" and "vsc8531,edge-slowdown" are accepted by the device driver. - Deleted include/dt-bindings/net/mscc-phy-vsc8531.h as it was not needed. - Read/validate devicetree settings in probe instead of init Signed-off-by: Allan W. Nielsen <allan.nielsen@microsemi.com> Signed-off-by: Raju Lakkaraju <raju.lakkaraju@microsemi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -6,22 +6,27 @@ Required properties:
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Documentation/devicetree/bindings/net/phy.txt
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Optional properties:
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- vsc8531,vddmac : The vddmac in mV.
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- vsc8531,vddmac : The vddmac in mV. Allowed values is listed
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in the first row of Table 1 (below).
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This property is only used in combination
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with the 'edge-slowdown' property.
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Default value is 3300.
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- vsc8531,edge-slowdown : % the edge should be slowed down relative to
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the fastest possible edge time. Native sign
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need not enter.
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the fastest possible edge time.
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Edge rate sets the drive strength of the MAC
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interface output signals. Changing the drive
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strength will affect the edge rate of the output
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signal. The goal of this setting is to help
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reduce electrical emission (EMI) by being able
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to reprogram drive strength and in effect slow
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down the edge rate if desired. Table 1 shows the
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impact to the edge rate per VDDMAC supply for each
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drive strength setting.
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Ref: Table:1 - Edge rate change below.
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Note: see dt-bindings/net/mscc-phy-vsc8531.h for applicable values
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interface output signals. Changing the
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drive strength will affect the edge rate of
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the output signal. The goal of this setting
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is to help reduce electrical emission (EMI)
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by being able to reprogram drive strength
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and in effect slow down the edge rate if
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desired.
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To adjust the edge-slowdown, the 'vddmac'
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must be specified. Table 1 lists the
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supported edge-slowdown values for a given
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'vddmac'.
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Default value is 0%.
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Ref: Table:1 - Edge rate change (below).
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Table: 1 - Edge rate change
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----------------------------------------------------------------|
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@ -29,23 +34,23 @@ Table: 1 - Edge rate change
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| |
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| 3300 mV 2500 mV 1800 mV 1500 mV |
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|---------------------------------------------------------------|
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| Default Deafult Default Default |
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| 0% 0% 0% 0% |
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| (Fastest) (recommended) (recommended) |
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|---------------------------------------------------------------|
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| -2% -3% -5% -6% |
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| 2% 3% 5% 6% |
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|---------------------------------------------------------------|
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| -4% -6% -9% -14% |
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| 4% 6% 9% 14% |
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|---------------------------------------------------------------|
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| -7% -10% -16% -21% |
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| 7% 10% 16% 21% |
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|(recommended) (recommended) |
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|---------------------------------------------------------------|
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| -10% -14% -23% -29% |
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| 10% 14% 23% 29% |
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|---------------------------------------------------------------|
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| -17% -23% -35% -42% |
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| 17% 23% 35% 42% |
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|---------------------------------------------------------------|
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| -29% -37% -52% -58% |
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| 29% 37% 52% 58% |
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|---------------------------------------------------------------|
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| -53% -63% -76% -77% |
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| 53% 63% 76% 77% |
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| (slowest) |
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|---------------------------------------------------------------|
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@ -54,5 +59,5 @@ Example:
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vsc8531_0: ethernet-phy@0 {
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compatible = "ethernet-phy-id0007.0570";
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vsc8531,vddmac = <3300>;
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vsc8531,edge-slowdown = <21>;
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vsc8531,edge-slowdown = <7>;
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};
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@ -12,7 +12,6 @@
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#include <linux/mii.h>
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#include <linux/phy.h>
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#include <linux/of.h>
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#include <dt-bindings/net/mscc-phy-vsc8531.h>
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#include <linux/netdevice.h>
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enum rgmii_rx_clock_delay {
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@ -69,23 +68,29 @@ enum rgmii_rx_clock_delay {
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#define PHY_ID_VSC8531 0x00070570
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#define PHY_ID_VSC8541 0x00070770
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struct edge_rate_table {
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u16 vddmac;
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int slowdown[MSCC_SLOWDOWN_MAX];
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};
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struct edge_rate_table edge_table[MSCC_VDDMAC_MAX] = {
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{3300, { 0, -2, -4, -7, -10, -17, -29, -53} },
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{2500, { 0, -3, -6, -10, -14, -23, -37, -63} },
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{1800, { 0, -5, -9, -16, -23, -35, -52, -76} },
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{1500, { 0, -6, -14, -21, -29, -42, -58, -77} },
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};
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#define MSCC_VDDMAC_1500 1500
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#define MSCC_VDDMAC_1800 1800
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#define MSCC_VDDMAC_2500 2500
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#define MSCC_VDDMAC_3300 3300
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struct vsc8531_private {
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u8 edge_slowdown;
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u16 vddmac;
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int rate_magic;
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};
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#ifdef CONFIG_OF_MDIO
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struct vsc8531_edge_rate_table {
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u16 vddmac;
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u8 slowdown[8];
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};
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static const struct vsc8531_edge_rate_table edge_table[] = {
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{MSCC_VDDMAC_3300, { 0, 2, 4, 7, 10, 17, 29, 53} },
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{MSCC_VDDMAC_2500, { 0, 3, 6, 10, 14, 23, 37, 63} },
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{MSCC_VDDMAC_1800, { 0, 5, 9, 16, 23, 35, 52, 76} },
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{MSCC_VDDMAC_1500, { 0, 6, 14, 21, 29, 42, 58, 77} },
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};
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#endif /* CONFIG_OF_MDIO */
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static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
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{
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int rc;
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@ -205,29 +210,43 @@ out_unlock:
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mutex_unlock(&phydev->lock);
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}
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static u8 edge_rate_magic_get(u16 vddmac,
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int slowdown)
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#ifdef CONFIG_OF_MDIO
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static int vsc85xx_edge_rate_magic_get(struct phy_device *phydev)
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{
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int rc = (MSCC_SLOWDOWN_MAX - 1);
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u8 vdd;
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u8 sd;
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u16 vdd;
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int rc, i, j;
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struct device *dev = &phydev->mdio.dev;
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struct device_node *of_node = dev->of_node;
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u8 sd_array_size = ARRAY_SIZE(edge_table[0].slowdown);
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for (vdd = 0; vdd < MSCC_VDDMAC_MAX; vdd++) {
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if (edge_table[vdd].vddmac == vddmac) {
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for (sd = 0; sd < MSCC_SLOWDOWN_MAX; sd++) {
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if (edge_table[vdd].slowdown[sd] <= slowdown) {
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rc = (MSCC_SLOWDOWN_MAX - sd - 1);
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break;
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}
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}
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}
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}
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if (!of_node)
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return -ENODEV;
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return rc;
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}
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rc = of_property_read_u16(of_node, "vsc8531,vddmac", &vdd);
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if (rc != 0)
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vdd = MSCC_VDDMAC_3300;
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static int vsc85xx_edge_rate_cntl_set(struct phy_device *phydev,
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u8 edge_rate)
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rc = of_property_read_u8(of_node, "vsc8531,edge-slowdown", &sd);
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if (rc != 0)
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sd = 0;
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for (i = 0; i < ARRAY_SIZE(edge_table); i++)
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if (edge_table[i].vddmac == vdd)
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for (j = 0; j < sd_array_size; j++)
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if (edge_table[i].slowdown[j] == sd)
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return (sd_array_size - j - 1);
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return -EINVAL;
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}
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#else
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static int vsc85xx_edge_rate_magic_get(struct phy_device *phydev)
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{
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return 0;
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}
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#endif /* CONFIG_OF_MDIO */
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static int vsc85xx_edge_rate_cntl_set(struct phy_device *phydev, u8 edge_rate)
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{
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int rc;
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u16 reg_val;
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@ -308,45 +327,10 @@ out_unlock:
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return rc;
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}
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#ifdef CONFIG_OF_MDIO
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static int vsc8531_of_init(struct phy_device *phydev)
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{
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int rc;
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struct vsc8531_private *vsc8531 = phydev->priv;
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struct device *dev = &phydev->mdio.dev;
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struct device_node *of_node = dev->of_node;
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if (!of_node)
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return -ENODEV;
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rc = of_property_read_u16(of_node, "vsc8531,vddmac",
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&vsc8531->vddmac);
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if (rc == -EINVAL)
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vsc8531->vddmac = MSCC_VDDMAC_3300;
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rc = of_property_read_u8(of_node, "vsc8531,edge-slowdown",
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&vsc8531->edge_slowdown);
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if (rc == -EINVAL)
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vsc8531->edge_slowdown = 0;
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rc = 0;
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return rc;
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}
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#else
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static int vsc8531_of_init(struct phy_device *phydev)
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{
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return 0;
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}
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#endif /* CONFIG_OF_MDIO */
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static int vsc85xx_config_init(struct phy_device *phydev)
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{
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int rc;
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struct vsc8531_private *vsc8531 = phydev->priv;
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u8 edge_rate;
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rc = vsc8531_of_init(phydev);
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if (rc)
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return rc;
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rc = vsc85xx_default_config(phydev);
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if (rc)
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@ -356,9 +340,7 @@ static int vsc85xx_config_init(struct phy_device *phydev)
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if (rc)
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return rc;
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edge_rate = edge_rate_magic_get(vsc8531->vddmac,
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-(int)vsc8531->edge_slowdown);
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rc = vsc85xx_edge_rate_cntl_set(phydev, edge_rate);
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rc = vsc85xx_edge_rate_cntl_set(phydev, vsc8531->rate_magic);
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if (rc)
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return rc;
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@ -396,14 +378,21 @@ static int vsc85xx_config_intr(struct phy_device *phydev)
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static int vsc85xx_probe(struct phy_device *phydev)
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{
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int rate_magic;
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struct vsc8531_private *vsc8531;
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rate_magic = vsc85xx_edge_rate_magic_get(phydev);
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if (rate_magic < 0)
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return rate_magic;
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vsc8531 = devm_kzalloc(&phydev->mdio.dev, sizeof(*vsc8531), GFP_KERNEL);
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if (!vsc8531)
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return -ENOMEM;
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phydev->priv = vsc8531;
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vsc8531->rate_magic = rate_magic;
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return 0;
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}
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/*
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* Device Tree constants for Microsemi VSC8531 PHY
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*
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* Author: Nagaraju Lakkaraju
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*
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* License: Dual MIT/GPL
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* Copyright (c) 2016 Microsemi Corporation
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*/
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#ifndef _DT_BINDINGS_MSCC_VSC8531_H
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#define _DT_BINDINGS_MSCC_VSC8531_H
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/* MAC interface Edge rate control VDDMAC in milli Volts */
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#define MSCC_VDDMAC_3300 3300
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#define MSCC_VDDMAC_2500 2500
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#define MSCC_VDDMAC_1800 1800
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#define MSCC_VDDMAC_1500 1500
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#define MSCC_VDDMAC_MAX 4
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#define MSCC_SLOWDOWN_MAX 8
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#endif
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