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x86/devicetree: Use CPU description from Device Tree
Current x86 Device Tree implementation does not support multiprocessing. Use new DT bindings to describe the processors. Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Frank Rowand <frowand.list@gmail.com> Link: https://lkml.kernel.org/r/c291fb2cef51b730b59916d7745be0eaa4378c6c.1521753738.git.ivan.gorinov@intel.com
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@ -131,34 +131,52 @@ static void __init dtb_setup_hpet(void)
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#endif
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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static void __init dtb_cpu_setup(void)
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{
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struct device_node *dn;
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u32 apic_id, version;
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int ret;
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version = GET_APIC_VERSION(apic_read(APIC_LVR));
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for_each_node_by_type(dn, "cpu") {
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ret = of_property_read_u32(dn, "reg", &apic_id);
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if (ret < 0) {
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pr_warn("%pOF: missing local APIC ID\n", dn);
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continue;
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}
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generic_processor_info(apic_id, version);
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}
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}
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static void __init dtb_lapic_setup(void)
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{
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#ifdef CONFIG_X86_LOCAL_APIC
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struct device_node *dn;
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struct resource r;
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unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
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int ret;
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dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
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if (!dn)
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return;
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ret = of_address_to_resource(dn, 0, &r);
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if (WARN_ON(ret))
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return;
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if (dn) {
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ret = of_address_to_resource(dn, 0, &r);
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if (WARN_ON(ret))
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return;
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lapic_addr = r.start;
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}
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/* Did the boot loader setup the local APIC ? */
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if (!boot_cpu_has(X86_FEATURE_APIC)) {
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if (apic_force_enable(r.start))
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if (apic_force_enable(lapic_addr))
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return;
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}
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smp_found_config = 1;
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pic_mode = 1;
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register_lapic_address(r.start);
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generic_processor_info(boot_cpu_physical_apicid,
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GET_APIC_VERSION(apic_read(APIC_LVR)));
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#endif
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register_lapic_address(lapic_addr);
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}
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#endif /* CONFIG_X86_LOCAL_APIC */
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#ifdef CONFIG_X86_IO_APIC
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static unsigned int ioapic_id;
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@ -259,7 +277,10 @@ static void __init dtb_ioapic_setup(void) {}
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static void __init dtb_apic_setup(void)
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{
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#ifdef CONFIG_X86_LOCAL_APIC
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dtb_lapic_setup();
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dtb_cpu_setup();
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#endif
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dtb_ioapic_setup();
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}
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