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net/mlx5: Enable setting hairpin queue size
Allow to specify the size of the hairpin queues along with the packet buffer data size from the core setup code. If the driver doesn't provide this, the FW applies proper value that matches the provided data size and a FW chosen RQ stride size. Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -413,6 +413,7 @@ static int mlx5_hairpin_create_rq(struct mlx5_core_dev *mdev,
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MLX5_SET(rqc, rqc, counter_set_id, params->q_counter);
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MLX5_SET(wq, wq, log_hairpin_data_sz, params->log_data_size);
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MLX5_SET(wq, wq, log_hairpin_num_packets, params->log_num_packets);
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return mlx5_core_create_rq(mdev, in, MLX5_ST_SZ_BYTES(create_rq_in), rqn);
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}
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@ -430,6 +431,7 @@ static int mlx5_hairpin_create_sq(struct mlx5_core_dev *mdev,
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MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST);
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MLX5_SET(wq, wq, log_hairpin_data_sz, params->log_data_size);
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MLX5_SET(wq, wq, log_hairpin_num_packets, params->log_num_packets);
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return mlx5_core_create_sq(mdev, in, MLX5_ST_SZ_BYTES(create_sq_in), sqn);
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}
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@ -1031,7 +1031,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
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u8 log_max_hairpin_queues[0x5];
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u8 reserved_at_3c8[0x3];
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u8 log_max_hairpin_wq_data_sz[0x5];
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u8 reserved_at_3d0[0xb];
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u8 reserved_at_3d0[0x3];
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u8 log_max_hairpin_num_packets[0x5];
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u8 reserved_at_3d8[0x3];
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u8 log_max_wq_sz[0x5];
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u8 nic_vport_change_event[0x1];
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@ -1172,7 +1174,9 @@ struct mlx5_ifc_wq_bits {
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u8 reserved_at_118[0x3];
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u8 log_wq_sz[0x5];
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u8 reserved_at_120[0xb];
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u8 reserved_at_120[0x3];
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u8 log_hairpin_num_packets[0x5];
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u8 reserved_at_128[0x3];
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u8 log_hairpin_data_sz[0x5];
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u8 reserved_at_130[0x5];
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@ -77,6 +77,7 @@ void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn);
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struct mlx5_hairpin_params {
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u8 log_data_size;
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u8 log_num_packets;
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u16 q_counter;
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int num_channels;
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};
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