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drm/i915: Rename i915_gem_timeline.next_seqno to .seqno

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Rename i915_gem_timeline member 'next_seqno' into 'seqno' as
the variable is pre-increment. We've already had two bugs due
to the confusing name, second is fixed as follow-up patch.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20161124144750.2610-1-chris@chris-wilson.co.uk
This commit is contained in:
Joonas Lahtinen 2016-11-24 14:47:49 +00:00 committed by Chris Wilson
parent 60abfbb86a
commit 4c266edb4c
3 changed files with 10 additions and 10 deletions
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4
drivers/gpu/drm/i915/i915_debugfs.c
View File

@ -552,7 +552,7 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x [current breadcrumb %x], completed? %d\n",
engine->name,
work->flip_queued_req->global_seqno,
atomic_read(&dev_priv->gt.global_timeline.next_seqno),
atomic_read(&dev_priv->gt.global_timeline.seqno),
intel_engine_get_seqno(engine),
i915_gem_request_completed(work->flip_queued_req));
} else
@ -1026,7 +1026,7 @@ i915_next_seqno_get(void *data, u64 *val)
{
struct drm_i915_private *dev_priv = data;
*val = 1 + atomic_read(&dev_priv->gt.global_timeline.next_seqno);
*val = 1 + atomic_read(&dev_priv->gt.global_timeline.seqno);
return 0;
}

14
drivers/gpu/drm/i915/i915_gem_request.c
View File

@ -330,11 +330,11 @@ static int i915_gem_init_global_seqno(struct drm_i915_private *i915, u32 seqno)
GEM_BUG_ON(i915->gt.active_requests > 1);
/* If the seqno wraps around, we need to clear the breadcrumb rbtree */
if (!i915_seqno_passed(seqno, atomic_read(&timeline->next_seqno))) {
if (!i915_seqno_passed(seqno, atomic_read(&timeline->seqno))) {
while (intel_breadcrumbs_busy(i915))
cond_resched(); /* spin until threads are complete */
}
atomic_set(&timeline->next_seqno, seqno);
atomic_set(&timeline->seqno, seqno);
/* Finally reset hw state */
for_each_engine(engine, i915, id)
@ -369,11 +369,11 @@ int i915_gem_set_global_seqno(struct drm_device *dev, u32 seqno)
static int reserve_global_seqno(struct drm_i915_private *i915)
{
u32 active_requests = ++i915->gt.active_requests;
u32 next_seqno = atomic_read(&i915->gt.global_timeline.next_seqno);
u32 seqno = atomic_read(&i915->gt.global_timeline.seqno);
int ret;
/* Reservation is fine until we need to wrap around */
if (likely(next_seqno + active_requests > next_seqno))
if (likely(seqno + active_requests > seqno))
return 0;
ret = i915_gem_init_global_seqno(i915, 0);
@ -387,13 +387,13 @@ static int reserve_global_seqno(struct drm_i915_private *i915)
static u32 __timeline_get_seqno(struct i915_gem_timeline *tl)
{
/* next_seqno only incremented under a mutex */
return ++tl->next_seqno.counter;
/* seqno only incremented under a mutex */
return ++tl->seqno.counter;
}
static u32 timeline_get_seqno(struct i915_gem_timeline *tl)
{
return atomic_inc_return(&tl->next_seqno);
return atomic_inc_return(&tl->seqno);
}
void __i915_gem_request_submit(struct drm_i915_gem_request *request)

2
drivers/gpu/drm/i915/i915_gem_timeline.h
View File

@ -56,7 +56,7 @@ struct intel_timeline {
struct i915_gem_timeline {
struct list_head link;
atomic_t next_seqno;
atomic_t seqno;
struct drm_i915_private *i915;
const char *name;