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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-04 11:24:04 +08:00

pwm: Changes for v4.18-rc1

This contains a couple of fixes and cleanups for the Meson and ACPI/LPSS
 drivers as well as capture support for STM32. Note that given the cross-
 subsystem changes, the STM32 patches were merged through the MFD and PWM
 trees, both sharing an immutable branch.
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Merge tag 'pwm/for-4.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "This contains a couple of fixes and cleanups for the Meson and
  ACPI/LPSS drivers as well as capture support for STM32.

  Note that given the cross- subsystem changes, the STM32 patches were
  merged through the MFD and PWM trees, both sharing an immutable
  branch"

* tag 'pwm/for-4.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: stm32: Fix build warning with CONFIG_DMA_ENGINE disabled
  pwm: stm32: Enforce dependency on CONFIG_MFD_STM32_TIMERS
  ACPI / LPSS: Add missing prv_offset setting for byt/cht PWM devices
  pwm: lpss: platform: Save/restore the ctrl register over a suspend/resume
  dt-bindings: mfd: stm32-timers: Add support for dmas
  pwm: simplify getting .drvdata
  pwm: meson: Fix allocation of PWM channel array
This commit is contained in:
Linus Torvalds 2018-06-14 16:25:43 +09:00
commit 4b4bb99b62
10 changed files with 66 additions and 12 deletions

View File

@ -19,6 +19,11 @@ Required parameters:
Optional parameters:
- resets: Phandle to the parent reset controller.
See ../reset/st,stm32-rcc.txt
- dmas: List of phandle to dma channels that can be used for
this timer instance. There may be up to 7 dma channels.
- dma-names: List of dma names. Must match 'dmas' property. Valid
names are: "ch1", "ch2", "ch3", "ch4", "up", "trig",
"com".
Optional subnodes:
- pwm: See ../pwm/pwm-stm32.txt
@ -44,3 +49,18 @@ Example:
reg = <0>;
};
};
Example with all dmas:
timer@40010000 {
...
dmas = <&dmamux1 11 0x400 0x0>,
<&dmamux1 12 0x400 0x0>,
<&dmamux1 13 0x400 0x0>,
<&dmamux1 14 0x400 0x0>,
<&dmamux1 15 0x400 0x0>,
<&dmamux1 16 0x400 0x0>,
<&dmamux1 17 0x400 0x0>;
dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig", "com";
...
child nodes...
};

View File

@ -233,11 +233,13 @@ static const struct lpss_device_desc lpt_sdio_dev_desc = {
static const struct lpss_device_desc byt_pwm_dev_desc = {
.flags = LPSS_SAVE_CTX,
.prv_offset = 0x800,
.setup = byt_pwm_setup,
};
static const struct lpss_device_desc bsw_pwm_dev_desc = {
.flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
.prv_offset = 0x800,
.setup = bsw_pwm_setup,
};

View File

@ -401,7 +401,7 @@ config PWM_STI
config PWM_STM32
tristate "STMicroelectronics STM32 PWM"
depends on MFD_STM32_TIMERS || COMPILE_TEST
depends on MFD_STM32_TIMERS
help
Generic PWM framework driver for STM32 SoCs.

View File

@ -460,8 +460,7 @@ MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);
#ifdef CONFIG_PM_SLEEP
static int atmel_tcb_pwm_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
struct atmel_tcb_pwm_chip *tcbpwm = dev_get_drvdata(dev);
void __iomem *base = tcbpwm->tc->regs;
int i;
@ -478,8 +477,7 @@ static int atmel_tcb_pwm_suspend(struct device *dev)
static int atmel_tcb_pwm_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
struct atmel_tcb_pwm_chip *tcbpwm = dev_get_drvdata(dev);
void __iomem *base = tcbpwm->tc->regs;
int i;

View File

@ -74,6 +74,10 @@ static int pwm_lpss_remove_platform(struct platform_device *pdev)
return pwm_lpss_remove(lpwm);
}
static SIMPLE_DEV_PM_OPS(pwm_lpss_platform_pm_ops,
pwm_lpss_suspend,
pwm_lpss_resume);
static const struct acpi_device_id pwm_lpss_acpi_match[] = {
{ "80860F09", (unsigned long)&pwm_lpss_byt_info },
{ "80862288", (unsigned long)&pwm_lpss_bsw_info },
@ -86,6 +90,7 @@ static struct platform_driver pwm_lpss_driver_platform = {
.driver = {
.name = "pwm-lpss",
.acpi_match_table = pwm_lpss_acpi_match,
.pm = &pwm_lpss_platform_pm_ops,
},
.probe = pwm_lpss_probe_platform,
.remove = pwm_lpss_remove_platform,

View File

@ -32,10 +32,13 @@
/* Size of each PWM register space if multiple */
#define PWM_SIZE 0x400
#define MAX_PWMS 4
struct pwm_lpss_chip {
struct pwm_chip chip;
void __iomem *regs;
const struct pwm_lpss_boardinfo *info;
u32 saved_ctrl[MAX_PWMS];
};
static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
@ -177,6 +180,9 @@ struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
unsigned long c;
int ret;
if (WARN_ON(info->npwm > MAX_PWMS))
return ERR_PTR(-ENODEV);
lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
if (!lpwm)
return ERR_PTR(-ENOMEM);
@ -212,6 +218,30 @@ int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
}
EXPORT_SYMBOL_GPL(pwm_lpss_remove);
int pwm_lpss_suspend(struct device *dev)
{
struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev);
int i;
for (i = 0; i < lpwm->info->npwm; i++)
lpwm->saved_ctrl[i] = readl(lpwm->regs + i * PWM_SIZE + PWM);
return 0;
}
EXPORT_SYMBOL_GPL(pwm_lpss_suspend);
int pwm_lpss_resume(struct device *dev)
{
struct pwm_lpss_chip *lpwm = dev_get_drvdata(dev);
int i;
for (i = 0; i < lpwm->info->npwm; i++)
writel(lpwm->saved_ctrl[i], lpwm->regs + i * PWM_SIZE + PWM);
return 0;
}
EXPORT_SYMBOL_GPL(pwm_lpss_resume);
MODULE_DESCRIPTION("PWM driver for Intel LPSS");
MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
MODULE_LICENSE("GPL v2");

View File

@ -28,5 +28,7 @@ struct pwm_lpss_boardinfo {
struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
const struct pwm_lpss_boardinfo *info);
int pwm_lpss_remove(struct pwm_lpss_chip *lpwm);
int pwm_lpss_suspend(struct device *dev);
int pwm_lpss_resume(struct device *dev);
#endif /* __PWM_LPSS_H */

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@ -541,8 +541,8 @@ static int meson_pwm_probe(struct platform_device *pdev)
meson->data = of_device_get_match_data(&pdev->dev);
meson->inverter_mask = BIT(meson->chip.npwm) - 1;
channels = devm_kcalloc(&pdev->dev, meson->chip.npwm, sizeof(*meson),
GFP_KERNEL);
channels = devm_kcalloc(&pdev->dev, meson->chip.npwm,
sizeof(*channels), GFP_KERNEL);
if (!channels)
return -ENOMEM;

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@ -261,8 +261,7 @@ MODULE_DEVICE_TABLE(of, rcar_pwm_of_table);
#ifdef CONFIG_PM_SLEEP
static struct pwm_device *rcar_pwm_dev_to_pwm_dev(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct rcar_pwm_chip *rcar_pwm = platform_get_drvdata(pdev);
struct rcar_pwm_chip *rcar_pwm = dev_get_drvdata(dev);
struct pwm_chip *chip = &rcar_pwm->chip;
return &chip->pwms[0];

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@ -484,9 +484,7 @@ static int stm32_pwm_apply_locked(struct pwm_chip *chip, struct pwm_device *pwm,
static const struct pwm_ops stm32pwm_ops = {
.owner = THIS_MODULE,
.apply = stm32_pwm_apply_locked,
#if IS_ENABLED(CONFIG_DMA_ENGINE)
.capture = stm32_pwm_capture,
#endif
.capture = IS_ENABLED(CONFIG_DMA_ENGINE) ? stm32_pwm_capture : NULL,
};
static int stm32_pwm_set_breakinput(struct stm32_pwm *priv,