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KVM: x86/mmu: Add separate override for MMU sync during fast CR3 switch
Add a separate "skip" override for MMU sync, a future change to avoid TLB flushes on nested VMX transitions may need to sync the MMU even if the TLB flush is unnecessary. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Message-Id: <20200320212833.3507-32-sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1524,7 +1524,8 @@ void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
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void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
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gva_t gva, hpa_t root_hpa);
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void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
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void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
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void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush,
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bool skip_mmu_sync);
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void kvm_configure_mmu(bool enable_tdp, int tdp_page_level);
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@ -4303,7 +4303,7 @@ static bool fast_cr3_switch(struct kvm_vcpu *vcpu, gpa_t new_cr3,
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static void __kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3,
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union kvm_mmu_page_role new_role,
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bool skip_tlb_flush)
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bool skip_tlb_flush, bool skip_mmu_sync)
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{
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if (!fast_cr3_switch(vcpu, new_cr3, new_role)) {
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kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, KVM_MMU_ROOT_CURRENT);
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@ -4318,10 +4318,10 @@ static void __kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3,
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*/
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kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
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if (!skip_tlb_flush) {
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if (!skip_mmu_sync)
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kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
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if (!skip_tlb_flush)
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kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
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}
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/*
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* The last MMIO access's GVA and GPA are cached in the VCPU. When
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@ -4334,10 +4334,11 @@ static void __kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3,
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__clear_sp_write_flooding_count(page_header(vcpu->arch.mmu->root_hpa));
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}
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void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush)
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void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush,
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bool skip_mmu_sync)
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{
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__kvm_mmu_new_cr3(vcpu, new_cr3, kvm_mmu_calc_root_page_role(vcpu),
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skip_tlb_flush);
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skip_tlb_flush, skip_mmu_sync);
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}
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EXPORT_SYMBOL_GPL(kvm_mmu_new_cr3);
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@ -5030,7 +5031,7 @@ void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
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kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
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execonly, level);
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__kvm_mmu_new_cr3(vcpu, new_eptp, new_role.base, false);
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__kvm_mmu_new_cr3(vcpu, new_eptp, new_role.base, false, false);
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if (new_role.as_u64 == context->mmu_role.as_u64)
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return;
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@ -1101,7 +1101,7 @@ static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool ne
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}
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if (!nested_ept)
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kvm_mmu_new_cr3(vcpu, cr3, false);
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kvm_mmu_new_cr3(vcpu, cr3, false, false);
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vcpu->arch.cr3 = cr3;
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kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
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@ -1031,7 +1031,7 @@ int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
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!load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
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return 1;
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kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
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kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
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vcpu->arch.cr3 = cr3;
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kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
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