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irqchip/atmel-aic: Fix wrong bit operation for IRQ priority
Atmel AIC has common structure for SMR (Source Mode Register).
bit[6:5] Interrupt source type
bit[2:0] Priority level
Other bits are unused.
To update new priority value, bit[2:0] should be cleared first and then
new priority level can be written. However, aic_common_set_priority()
helper clears source type bits instead of priority bits.
This patch fixes wrong mask bit operation.
Fixes: b1479ebb77
"irqchip: atmel-aic: Add atmel AIC/AIC5 drivers"
Signed-off-by: Milo Kim <milo.kim@ti.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: Nicholas Ferre <nicolas.ferre@atmel.com>
Cc: stable@vger.kernel.org #v3.17+
Link: http://lkml.kernel.org/r/1452669592-3401-2-git-send-email-milo.kim@ti.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
parent
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@ -86,7 +86,7 @@ int aic_common_set_priority(int priority, unsigned *val)
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priority > AT91_AIC_IRQ_MAX_PRIORITY)
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priority > AT91_AIC_IRQ_MAX_PRIORITY)
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return -EINVAL;
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return -EINVAL;
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*val &= AT91_AIC_PRIOR;
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*val &= ~AT91_AIC_PRIOR;
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*val |= priority;
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*val |= priority;
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return 0;
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return 0;
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