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First SoC batch for 4.7:
- chipid registers reading for SoC detection -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJW+qWDAAoJEAf03oE53VmQp3QIAKUgPwweT6udulMw8aNjLe53 H/6fN1XW0b5VbKl8Q0qoG1uW2Y5pVPemFjoerqTLlY8ZpvnxUTDQr0GM3pkYfawN 5CxrwlX3aiA79DFR/1HkTj92ORqgcsXR3fxDaJuzT4Q1kiRXmweKmZpzD3AwQUB4 B2Em079l05khV8KJcuM1H5+A9OuYfcao2UumlVEOFWfe3/mmPdfhi/qsryPGID00 mEoAdkRDu3XYvJNeD1pKqmP+lZT22jIazPeD4UrPcPGBCyD4OXySFdtu3z3zXY20 VOAiAc2E+BZ620SQ/loUNgaOK/H4nGic+ZngkfakBAytsH2XsLSMA6NfCqTiAJU= =hGSR -----END PGP SIGNATURE----- Merge tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc First SoC batch for 4.7: - chipid registers reading for SoC detection * tag 'at91-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: ARM: at91/soc: reference the whole sama5d2 family ARM: at91: use chipid device for soc detection Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
49ad80df26
@ -41,6 +41,10 @@ compatible: must be one of:
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- "atmel,sama5d43"
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- "atmel,sama5d44"
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Chipid required properties:
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- compatible: Should be "atmel,sama5d2-chipid"
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- reg : Should contain registers location and length
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PIT Timer required properties:
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- compatible: Should be "atmel,at91sam9260-pit"
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- reg: Should contain registers location and length
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@ -18,8 +18,26 @@
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#include "soc.h"
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static const struct at91_soc sama5_socs[] = {
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27_EXID_MATCH,
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D21CU_EXID_MATCH,
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"sama5d21", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
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"sama5d22", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
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"sama5d23", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
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"sama5d24", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CU_EXID_MATCH,
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"sama5d24", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D26CU_EXID_MATCH,
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"sama5d26", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CU_EXID_MATCH,
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"sama5d27", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
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"sama5d27", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
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"sama5d28", "sama5d2"),
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AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
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"sama5d28", "sama5d2"),
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AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
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"sama5d31", "sama5d3"),
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AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
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@ -22,48 +22,93 @@
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#include "soc.h"
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#define AT91_DBGU_CIDR 0x40
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#define AT91_DBGU_CIDR_VERSION(x) ((x) & 0x1f)
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#define AT91_DBGU_CIDR_EXT BIT(31)
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#define AT91_DBGU_CIDR_MATCH_MASK 0x7fffffe0
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#define AT91_DBGU_EXID 0x44
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#define AT91_CHIPID_CIDR 0x00
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#define AT91_CHIPID_EXID 0x04
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#define AT91_CIDR_VERSION(x) ((x) & 0x1f)
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#define AT91_CIDR_EXT BIT(31)
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#define AT91_CIDR_MATCH_MASK 0x7fffffe0
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struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
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static int __init at91_get_cidr_exid_from_dbgu(u32 *cidr, u32 *exid)
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{
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struct soc_device_attribute *soc_dev_attr;
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const struct at91_soc *soc;
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struct soc_device *soc_dev;
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struct device_node *np;
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void __iomem *regs;
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u32 cidr, exid;
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np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
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if (!np)
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np = of_find_compatible_node(NULL, NULL,
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"atmel,at91sam9260-dbgu");
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if (!np) {
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pr_warn("Could not find DBGU node");
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return NULL;
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}
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if (!np)
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return -ENODEV;
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regs = of_iomap(np, 0);
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of_node_put(np);
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if (!regs) {
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pr_warn("Could not map DBGU iomem range");
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return NULL;
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return -ENXIO;
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}
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cidr = readl(regs + AT91_DBGU_CIDR);
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exid = readl(regs + AT91_DBGU_EXID);
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*cidr = readl(regs + AT91_DBGU_CIDR);
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*exid = readl(regs + AT91_DBGU_EXID);
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iounmap(regs);
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return 0;
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}
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static int __init at91_get_cidr_exid_from_chipid(u32 *cidr, u32 *exid)
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{
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struct device_node *np;
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void __iomem *regs;
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np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-chipid");
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if (!np)
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return -ENODEV;
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regs = of_iomap(np, 0);
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of_node_put(np);
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if (!regs) {
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pr_warn("Could not map DBGU iomem range");
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return -ENXIO;
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}
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*cidr = readl(regs + AT91_CHIPID_CIDR);
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*exid = readl(regs + AT91_CHIPID_EXID);
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iounmap(regs);
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return 0;
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}
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struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
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{
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struct soc_device_attribute *soc_dev_attr;
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const struct at91_soc *soc;
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struct soc_device *soc_dev;
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u32 cidr, exid;
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int ret;
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/*
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* With SAMA5D2 and later SoCs, CIDR and EXID registers are no more
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* in the dbgu device but in the chipid device whose purpose is only
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* to expose these two registers.
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*/
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ret = at91_get_cidr_exid_from_dbgu(&cidr, &exid);
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if (ret)
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ret = at91_get_cidr_exid_from_chipid(&cidr, &exid);
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if (ret) {
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if (ret == -ENODEV)
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pr_warn("Could not find identification node");
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return NULL;
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}
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for (soc = socs; soc->name; soc++) {
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if (soc->cidr_match != (cidr & AT91_DBGU_CIDR_MATCH_MASK))
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if (soc->cidr_match != (cidr & AT91_CIDR_MATCH_MASK))
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continue;
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if (!(cidr & AT91_DBGU_CIDR_EXT) || soc->exid_match == exid)
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if (!(cidr & AT91_CIDR_EXT) || soc->exid_match == exid)
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break;
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}
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@ -79,7 +124,7 @@ struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
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soc_dev_attr->family = soc->family;
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soc_dev_attr->soc_id = soc->name;
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
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AT91_DBGU_CIDR_VERSION(cidr));
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AT91_CIDR_VERSION(cidr));
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->revision);
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@ -91,7 +136,7 @@ struct soc_device * __init at91_soc_init(const struct at91_soc *socs)
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if (soc->family)
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pr_info("Detected SoC family: %s\n", soc->family);
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pr_info("Detected SoC: %s, revision %X\n", soc->name,
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AT91_DBGU_CIDR_VERSION(cidr));
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AT91_CIDR_VERSION(cidr));
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return soc_dev;
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}
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@ -63,7 +63,17 @@ at91_soc_init(const struct at91_soc *socs);
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#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
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#define SAMA5D2_CIDR_MATCH 0x0a5c08c0
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#define SAMA5D27_EXID_MATCH 0x00000021
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#define SAMA5D21CU_EXID_MATCH 0x0000005a
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#define SAMA5D22CU_EXID_MATCH 0x00000059
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#define SAMA5D22CN_EXID_MATCH 0x00000069
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#define SAMA5D23CU_EXID_MATCH 0x00000058
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#define SAMA5D24CX_EXID_MATCH 0x00000004
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#define SAMA5D24CU_EXID_MATCH 0x00000014
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#define SAMA5D26CU_EXID_MATCH 0x00000012
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#define SAMA5D27CU_EXID_MATCH 0x00000011
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#define SAMA5D27CN_EXID_MATCH 0x00000021
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#define SAMA5D28CU_EXID_MATCH 0x00000010
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#define SAMA5D28CN_EXID_MATCH 0x00000020
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#define SAMA5D3_CIDR_MATCH 0x0a5c07c0
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#define SAMA5D31_EXID_MATCH 0x00444300
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