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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-14 00:04:00 +08:00

clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()

Mostly converted with the following semantic patch:

@@
struct clk_hw *E;
@@

-__clk_get_num_parents(E->clk)
+clk_hw_get_num_parents(E)

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Chao Xie <chao.xie@marvell.com>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: "Emilio López" <emilio@elopez.com.ar>
Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Stephen Boyd 2015-06-25 16:53:23 -07:00 committed by Michael Turquette
parent 1a9c069cb2
commit 497295afb5
15 changed files with 20 additions and 20 deletions

View File

@ -64,7 +64,7 @@ static int clk_programmable_determine_rate(struct clk_hw *hw,
int shift;
int i;
for (i = 0; i < __clk_get_num_parents(hw->clk); i++) {
for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
parent = clk_get_parent_by_index(hw->clk, i);
if (!parent)
continue;

View File

@ -66,7 +66,7 @@ static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
int tmp_diff;
int i;
for (i = 0; i < __clk_get_num_parents(hw->clk); i++) {
for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
int div;
parent = clk_get_parent_by_index(hw->clk, i);

View File

@ -92,7 +92,7 @@ static int clk_composite_determine_rate(struct clk_hw *hw,
return 0;
}
for (i = 0; i < __clk_get_num_parents(mux_hw->clk); i++) {
for (i = 0; i < clk_hw_get_num_parents(mux_hw); i++) {
parent = clk_get_parent_by_index(mux_hw->clk, i);
if (!parent)
continue;

View File

@ -31,7 +31,7 @@
static u8 clk_mux_get_parent(struct clk_hw *hw)
{
struct clk_mux *mux = to_clk_mux(hw);
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
u32 val;
/*

View File

@ -63,7 +63,7 @@ static unsigned int _get_div(struct mmp_clk_mix *mix, unsigned int val)
static unsigned int _get_mux(struct mmp_clk_mix *mix, unsigned int val)
{
int num_parents = __clk_get_num_parents(mix->hw.clk);
int num_parents = clk_hw_get_num_parents(&mix->hw);
int i;
if (mix->mux_flags & CLK_MUX_INDEX_BIT)
@ -241,7 +241,7 @@ static int mmp_clk_mix_determine_rate(struct clk_hw *hw,
}
}
} else {
for (i = 0; i < __clk_get_num_parents(mix_clk); i++) {
for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
parent = clk_get_parent_by_index(mix_clk, i);
parent_rate = __clk_get_rate(parent);
div_val_max = _get_maxdiv(mix);
@ -408,13 +408,13 @@ static int mmp_clk_set_rate(struct clk_hw *hw, unsigned long rate,
else
return -EINVAL;
} else {
for (i = 0; i < __clk_get_num_parents(mix_clk); i++) {
for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
parent = clk_get_parent_by_index(mix_clk, i);
parent_rate = __clk_get_rate(parent);
if (parent_rate == best_parent_rate)
break;
}
if (i < __clk_get_num_parents(mix_clk))
if (i < clk_hw_get_num_parents(hw))
return _set_rate(mix, _get_mux_val(mix, i),
_get_div_val(mix, best_divisor), 1, 1);
else

View File

@ -45,7 +45,7 @@ static u32 src_to_ns(struct src_sel *s, u8 src, u32 ns)
static u8 clk_rcg_get_parent(struct clk_hw *hw)
{
struct clk_rcg *rcg = to_clk_rcg(hw);
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
u32 ns;
int i, ret;
@ -72,7 +72,7 @@ static int reg_to_bank(struct clk_dyn_rcg *rcg, u32 bank)
static u8 clk_dyn_rcg_get_parent(struct clk_hw *hw)
{
struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw);
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
u32 ns, reg;
int bank;
int i, ret;

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@ -63,7 +63,7 @@ static int clk_rcg2_is_enabled(struct clk_hw *hw)
static u8 clk_rcg2_get_parent(struct clk_hw *hw)
{
struct clk_rcg2 *rcg = to_clk_rcg2(hw);
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
u32 cfg;
int i, ret;

View File

@ -46,7 +46,7 @@ EXPORT_SYMBOL_GPL(qcom_find_freq);
int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
{
int i, num_parents = __clk_get_num_parents(hw->clk);
int i, num_parents = clk_hw_get_num_parents(hw);
for (i = 0; i < num_parents; i++)
if (src == map[i].src)

View File

@ -510,7 +510,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index)
u32 val;
struct clk_pix_rdi *rdi = to_clk_pix_rdi(hw);
struct clk *clk = hw->clk;
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
/*
* These clocks select three inputs via two muxes. One mux selects

View File

@ -61,7 +61,7 @@ struct s3c24xx_clkout {
static u8 s3c24xx_clkout_get_parent(struct clk_hw *hw)
{
struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw);
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
u32 val;
val = readl_relaxed(S3C24XX_MISCCR) >> clkout->shift;

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@ -133,7 +133,7 @@ static u8 cpg_div6_clock_get_parent(struct clk_hw *hw)
hw_index = (clk_readl(clock->reg) >> clock->src_shift) &
(BIT(clock->src_width) - 1);
for (i = 0; i < __clk_get_num_parents(hw->clk); i++) {
for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
if (clock->parents[i] == hw_index)
return i;
}
@ -149,7 +149,7 @@ static int cpg_div6_clock_set_parent(struct clk_hw *hw, u8 index)
u8 hw_index;
u32 mask;
if (index >= __clk_get_num_parents(hw->clk))
if (index >= clk_hw_get_num_parents(hw))
return -EINVAL;
mask = ~((BIT(clock->src_width) - 1) << clock->src_shift);

View File

@ -87,7 +87,7 @@ static int clk_factors_determine_rate(struct clk_hw *hw,
unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
/* find the parent that can help provide the fastest rate <= rate */
num_parents = __clk_get_num_parents(clk);
num_parents = clk_hw_get_num_parents(hw);
for (i = 0; i < num_parents; i++) {
parent = clk_get_parent_by_index(clk, i);
if (!parent)

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@ -47,7 +47,7 @@ static unsigned long ar100_recalc_rate(struct clk_hw *hw,
static int ar100_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
int nparents = __clk_get_num_parents(hw->clk);
int nparents = clk_hw_get_num_parents(hw);
long best_rate = -EINVAL;
int i;

View File

@ -128,7 +128,7 @@ static int sun6i_ahb1_clk_determine_rate(struct clk_hw *hw,
unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
/* find the parent that can help provide the fastest rate <= rate */
num_parents = __clk_get_num_parents(clk);
num_parents = clk_hw_get_num_parents(hw);
for (i = 0; i < num_parents; i++) {
parent = clk_get_parent_by_index(clk, i);
if (!parent)

View File

@ -31,7 +31,7 @@
static u8 ti_clk_mux_get_parent(struct clk_hw *hw)
{
struct clk_mux *mux = to_clk_mux(hw);
int num_parents = __clk_get_num_parents(hw->clk);
int num_parents = clk_hw_get_num_parents(hw);
u32 val;
/*