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clk: qcom: gcc-msm8996: Mark aggre0 noc clks as critical
aggre0 bus clks are not associated with any of the drivers, so its important that these clks are always on to get peripherals on this bus working. So mark them as critical. Eventually when we have a proper bus driver these clks can be marked appropriately. Without this patch pcie on db820c is not functional. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -2895,7 +2895,7 @@ static struct clk_branch gcc_aggre0_snoc_axi_clk = {
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.name = "gcc_aggre0_snoc_axi_clk",
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.parent_names = (const char *[]){ "system_noc_clk_src" },
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
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.ops = &clk_branch2_ops,
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},
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},
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@ -2910,7 +2910,7 @@ static struct clk_branch gcc_aggre0_cnoc_ahb_clk = {
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.name = "gcc_aggre0_cnoc_ahb_clk",
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.parent_names = (const char *[]){ "config_noc_clk_src" },
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
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.ops = &clk_branch2_ops,
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},
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},
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@ -2925,7 +2925,7 @@ static struct clk_branch gcc_smmu_aggre0_axi_clk = {
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.name = "gcc_smmu_aggre0_axi_clk",
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.parent_names = (const char *[]){ "system_noc_clk_src" },
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
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.ops = &clk_branch2_ops,
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},
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},
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@ -2940,7 +2940,7 @@ static struct clk_branch gcc_smmu_aggre0_ahb_clk = {
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.name = "gcc_smmu_aggre0_ahb_clk",
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.parent_names = (const char *[]){ "config_noc_clk_src" },
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.num_parents = 1,
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.flags = CLK_SET_RATE_PARENT,
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.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
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.ops = &clk_branch2_ops,
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},
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},
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