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ARM: dts: exynos: Add all required FIMC-IS clocks to exynos4x12

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FIMC-IS blocks must control 3 more clocks ("gicisp", "mcuctl_isp" and
"pwm_isp") to make the hardware fully operational.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This commit is contained in:
Marek Szyprowski 2016-08-31 15:25:18 +02:00 committed by Krzysztof Kozlowski
parent d7ec05cbd1
commit 47aabaf5a8
1 changed files with 4 additions and 1 deletions
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5
arch/arm/boot/dts/exynos4x12.dtsi
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@ -157,7 +157,9 @@
<&clock CLK_MOUT_MPLL_USER_T>, <&clock CLK_MOUT_MPLL_USER_T>,
<&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>, <&clock CLK_FIMC_ISP>, <&clock CLK_FIMC_DRC>,
<&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>, <&clock CLK_FIMC_FD>, <&clock CLK_MCUISP>,
<&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>, <&clock CLK_GICISP>, <&clock CLK_MCUCTL_ISP>,
<&clock CLK_PWM_ISP>,
<&clock CLK_DIV_ISP0>, <&clock CLK_DIV_ISP1>,
<&clock CLK_DIV_MCUISP0>, <&clock CLK_DIV_MCUISP0>,
<&clock CLK_DIV_MCUISP1>, <&clock CLK_DIV_MCUISP1>,
<&clock CLK_UART_ISP_SCLK>, <&clock CLK_UART_ISP_SCLK>,
@ -167,6 +169,7 @@
clock-names = "lite0", "lite1", "ppmuispx", clock-names = "lite0", "lite1", "ppmuispx",
"ppmuispmx", "mpll", "isp", "ppmuispmx", "mpll", "isp",
"drc", "fd", "mcuisp", "drc", "fd", "mcuisp",
"gicisp", "mcuctl_isp", "pwm_isp",
"ispdiv0", "ispdiv1", "mcuispdiv0", "ispdiv0", "ispdiv1", "mcuispdiv0",
"mcuispdiv1", "uart", "aclk200", "mcuispdiv1", "uart", "aclk200",
"div_aclk200", "aclk400mcuisp", "div_aclk200", "aclk400mcuisp",