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ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx

SCPI and SRAM are identical on GXBB and GXL. Moving the corresponding
nodes to meson-gx adds support for the thermal sensor on GXL based
devices.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: add scpi_clocks label]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2016-12-03 00:08:48 +01:00 committed by Kevin Hilman
parent a121103c92
commit 47961f1353
2 changed files with 45 additions and 57 deletions

View File

@ -65,6 +65,7 @@
reg = <0x0 0x0>; reg = <0x0 0x0>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
@ -73,6 +74,7 @@
reg = <0x0 0x1>; reg = <0x0 0x1>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
@ -81,6 +83,7 @@
reg = <0x0 0x2>; reg = <0x0 0x2>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
@ -89,6 +92,7 @@
reg = <0x0 0x3>; reg = <0x0 0x3>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
}; };
l2: l2-cache0 { l2: l2-cache0 {
@ -153,6 +157,28 @@
}; };
}; };
scpi {
compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
mboxes = <&mailbox 1 &mailbox 2>;
shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
scpi_clocks: clocks {
compatible = "arm,scpi-clocks";
scpi_dvfs: scpi_clocks@0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
clock-output-names = "vcpu";
};
};
scpi_sensors: sensors {
compatible = "arm,scpi-sensors";
#thermal-sensor-cells = <1>;
};
};
soc { soc {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <2>; #address-cells = <2>;
@ -264,6 +290,25 @@
#address-cells = <0>; #address-cells = <0>;
}; };
sram: sram@c8000000 {
compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
reg = <0x0 0xc8000000 0x0 0x14000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0xc8000000 0x14000>;
cpu_scp_lpri: scp-shmem@0 {
compatible = "amlogic,meson-gxbb-scp-shmem";
reg = <0x13000 0x400>;
};
cpu_scp_hpri: scp-shmem@200 {
compatible = "amlogic,meson-gxbb-scp-shmem";
reg = <0x13400 0x400>;
};
};
aobus: aobus@c8100000 { aobus: aobus@c8100000 {
compatible = "simple-bus"; compatible = "simple-bus";
reg = <0x0 0xc8100000 0x0 0x100000>; reg = <0x0 0xc8100000 0x0 0x100000>;

View File

@ -50,28 +50,6 @@
/ { / {
compatible = "amlogic,meson-gxbb"; compatible = "amlogic,meson-gxbb";
scpi {
compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
mboxes = <&mailbox 1 &mailbox 2>;
shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
clocks {
compatible = "arm,scpi-clocks";
scpi_dvfs: scpi_clocks@0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>;
clock-output-names = "vcpu";
};
};
scpi_sensors: sensors {
compatible = "arm,scpi-sensors";
#thermal-sensor-cells = <1>;
};
};
soc { soc {
usb0_phy: phy@c0000000 { usb0_phy: phy@c0000000 {
compatible = "amlogic,meson-gxbb-usb2-phy"; compatible = "amlogic,meson-gxbb-usb2-phy";
@ -93,25 +71,6 @@
status = "disabled"; status = "disabled";
}; };
sram: sram@c8000000 {
compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
reg = <0x0 0xc8000000 0x0 0x14000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0xc8000000 0x14000>;
cpu_scp_lpri: scp-shmem@0 {
compatible = "amlogic,meson-gxbb-scp-shmem";
reg = <0x13000 0x400>;
};
cpu_scp_hpri: scp-shmem@200 {
compatible = "amlogic,meson-gxbb-scp-shmem";
reg = <0x13400 0x400>;
};
};
usb0: usb@c9000000 { usb0: usb@c9000000 {
compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
reg = <0x0 0xc9000000 0x0 0x40000>; reg = <0x0 0xc9000000 0x0 0x40000>;
@ -138,22 +97,6 @@
}; };
}; };
&cpu0 {
clocks = <&scpi_dvfs 0>;
};
&cpu1 {
clocks = <&scpi_dvfs 0>;
};
&cpu2 {
clocks = <&scpi_dvfs 0>;
};
&cpu3 {
clocks = <&scpi_dvfs 0>;
};
&cbus { &cbus {
spifc: spi@8c80 { spifc: spi@8c80 {
compatible = "amlogic,meson-gxbb-spifc"; compatible = "amlogic,meson-gxbb-spifc";