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https://github.com/edk2-porting/linux-next.git
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ARM: vexpress: Add CLCD Device Tree properties
... for V2M-P1 motherboard CLCD (limited to 640x480 16bpp and using dedicated video RAM bank) and for V2P-CA9 (up to 1024x768 16bpp). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
parent
667bbd5337
commit
478a4f81af
arch/arm/boot/dts
@ -41,7 +41,7 @@
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bank-width = <4>;
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bank-width = <4>;
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};
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};
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vram@2,00000000 {
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v2m_video_ram: vram@2,00000000 {
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compatible = "arm,vexpress-vram";
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compatible = "arm,vexpress-vram";
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reg = <2 0x00000000 0x00800000>;
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reg = <2 0x00000000 0x00800000>;
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};
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};
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@ -246,9 +246,41 @@
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clcd@1f0000 {
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clcd@1f0000 {
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compatible = "arm,pl111", "arm,primecell";
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compatible = "arm,pl111", "arm,primecell";
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reg = <0x1f0000 0x1000>;
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reg = <0x1f0000 0x1000>;
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interrupt-names = "combined";
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interrupts = <14>;
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interrupts = <14>;
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clocks = <&v2m_oscclk1>, <&smbclk>;
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clocks = <&v2m_oscclk1>, <&smbclk>;
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clock-names = "clcdclk", "apb_pclk";
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clock-names = "clcdclk", "apb_pclk";
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memory-region = <&v2m_video_ram>;
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max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
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port {
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v2m_clcd_pads: endpoint {
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remote-endpoint = <&v2m_clcd_panel>;
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arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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};
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};
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panel {
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compatible = "panel-dpi";
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port {
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v2m_clcd_panel: endpoint {
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remote-endpoint = <&v2m_clcd_pads>;
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};
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};
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panel-timing {
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clock-frequency = <25175000>;
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hactive = <640>;
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hback-porch = <40>;
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hfront-porch = <24>;
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hsync-len = <96>;
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vactive = <480>;
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vback-porch = <32>;
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vfront-porch = <11>;
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vsync-len = <2>;
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};
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};
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};
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};
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};
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};
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@ -350,7 +382,7 @@
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/* CLCD clock */
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/* CLCD clock */
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compatible = "arm,vexpress-osc";
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 1>;
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arm,vexpress-sysreg,func = <1 1>;
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freq-range = <23750000 63500000>;
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freq-range = <23750000 65000000>;
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#clock-cells = <0>;
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#clock-cells = <0>;
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clock-output-names = "v2m:oscclk1";
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clock-output-names = "v2m:oscclk1";
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};
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};
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@ -40,7 +40,7 @@
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bank-width = <4>;
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bank-width = <4>;
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};
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};
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vram@3,00000000 {
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v2m_video_ram: vram@3,00000000 {
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compatible = "arm,vexpress-vram";
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compatible = "arm,vexpress-vram";
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reg = <3 0x00000000 0x00800000>;
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reg = <3 0x00000000 0x00800000>;
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};
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};
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@ -245,9 +245,41 @@
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clcd@1f000 {
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clcd@1f000 {
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compatible = "arm,pl111", "arm,primecell";
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compatible = "arm,pl111", "arm,primecell";
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reg = <0x1f000 0x1000>;
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reg = <0x1f000 0x1000>;
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interrupt-names = "combined";
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interrupts = <14>;
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interrupts = <14>;
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clocks = <&v2m_oscclk1>, <&smbclk>;
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clocks = <&v2m_oscclk1>, <&smbclk>;
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clock-names = "clcdclk", "apb_pclk";
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clock-names = "clcdclk", "apb_pclk";
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memory-region = <&v2m_video_ram>;
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max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
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port {
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v2m_clcd_pads: endpoint {
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remote-endpoint = <&v2m_clcd_panel>;
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arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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};
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};
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panel {
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compatible = "panel-dpi";
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port {
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v2m_clcd_panel: endpoint {
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remote-endpoint = <&v2m_clcd_pads>;
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};
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};
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panel-timing {
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clock-frequency = <25175000>;
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hactive = <640>;
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hback-porch = <40>;
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hfront-porch = <24>;
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hsync-len = <96>;
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vactive = <480>;
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vback-porch = <32>;
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vfront-porch = <11>;
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vsync-len = <2>;
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};
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};
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};
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};
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};
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};
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@ -349,7 +381,7 @@
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/* CLCD clock */
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/* CLCD clock */
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compatible = "arm,vexpress-osc";
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 1>;
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arm,vexpress-sysreg,func = <1 1>;
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freq-range = <23750000 63500000>;
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freq-range = <23750000 65000000>;
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#clock-cells = <0>;
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#clock-cells = <0>;
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clock-output-names = "v2m:oscclk1";
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clock-output-names = "v2m:oscclk1";
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};
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};
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@ -70,9 +70,40 @@
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clcd@10020000 {
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clcd@10020000 {
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compatible = "arm,pl111", "arm,primecell";
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compatible = "arm,pl111", "arm,primecell";
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reg = <0x10020000 0x1000>;
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reg = <0x10020000 0x1000>;
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interrupt-names = "combined";
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interrupts = <0 44 4>;
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interrupts = <0 44 4>;
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clocks = <&oscclk1>, <&oscclk2>;
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clocks = <&oscclk1>, <&oscclk2>;
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clock-names = "clcdclk", "apb_pclk";
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clock-names = "clcdclk", "apb_pclk";
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max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
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port {
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clcd_pads: endpoint {
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remote-endpoint = <&clcd_panel>;
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arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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};
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};
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panel {
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compatible = "panel-dpi";
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port {
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clcd_panel: endpoint {
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remote-endpoint = <&clcd_pads>;
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};
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};
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panel-timing {
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clock-frequency = <63500127>;
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hactive = <1024>;
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hback-porch = <152>;
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hfront-porch = <48>;
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hsync-len = <104>;
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vactive = <768>;
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vback-porch = <23>;
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vfront-porch = <3>;
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vsync-len = <4>;
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};
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};
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};
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};
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memory-controller@100e0000 {
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memory-controller@100e0000 {
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