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mlxsw: reg: Add The Router TCAM Allocation register
This register is used for allocation of regions in the TCAM table and it will be used by the multicast router offloading logic. Signed-off-by: Yotam Gigi <yotamg@mellanox.com> Reviewed-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: Jiri Pirko <jiri@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4310,6 +4310,57 @@ mlxsw_reg_ritr_loopback_ipip4_pack(char *payload,
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mlxsw_reg_ritr_loopback_ipip_usip4_set(payload, usip);
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}
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/* RTAR - Router TCAM Allocation Register
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* --------------------------------------
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* This register is used for allocation of regions in the TCAM table.
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*/
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#define MLXSW_REG_RTAR_ID 0x8004
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#define MLXSW_REG_RTAR_LEN 0x20
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MLXSW_REG_DEFINE(rtar, MLXSW_REG_RTAR_ID, MLXSW_REG_RTAR_LEN);
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enum mlxsw_reg_rtar_op {
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MLXSW_REG_RTAR_OP_ALLOCATE,
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MLXSW_REG_RTAR_OP_RESIZE,
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MLXSW_REG_RTAR_OP_DEALLOCATE,
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};
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/* reg_rtar_op
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* Access: WO
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*/
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MLXSW_ITEM32(reg, rtar, op, 0x00, 28, 4);
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enum mlxsw_reg_rtar_key_type {
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MLXSW_REG_RTAR_KEY_TYPE_IPV4_MULTICAST = 1,
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MLXSW_REG_RTAR_KEY_TYPE_IPV6_MULTICAST = 3
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};
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/* reg_rtar_key_type
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* TCAM key type for the region.
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* Access: WO
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*/
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MLXSW_ITEM32(reg, rtar, key_type, 0x00, 0, 8);
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/* reg_rtar_region_size
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* TCAM region size. When allocating/resizing this is the requested
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* size, the response is the actual size.
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* Note: Actual size may be larger than requested.
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* Reserved for op = Deallocate
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* Access: WO
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*/
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MLXSW_ITEM32(reg, rtar, region_size, 0x04, 0, 16);
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static inline void mlxsw_reg_rtar_pack(char *payload,
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enum mlxsw_reg_rtar_op op,
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enum mlxsw_reg_rtar_key_type key_type,
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u16 region_size)
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{
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MLXSW_REG_ZERO(rtar, payload);
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mlxsw_reg_rtar_op_set(payload, op);
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mlxsw_reg_rtar_key_type_set(payload, key_type);
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mlxsw_reg_rtar_region_size_set(payload, region_size);
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}
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/* RATR - Router Adjacency Table Register
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* --------------------------------------
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* The RATR register is used to configure the Router Adjacency (next-hop)
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@ -6855,6 +6906,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(hpkt),
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MLXSW_REG(rgcr),
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MLXSW_REG(ritr),
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MLXSW_REG(rtar),
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MLXSW_REG(ratr),
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MLXSW_REG(rtdp),
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MLXSW_REG(ricnt),
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