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ARM: SoC code changes for 6.7
The AMD Pensando DPU platform gets added to arm64, and some minor updates make it into Renesas' 32-bit platforms. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmVCG78ACgkQYKtH/8kJ UidjTxAAvZBsS8Zsk7kJyLPYE5KjMb+UywT2VYAq/eBTtK+dpL09TPCpfmVencVL G3RbNUQgnM9Honn7lOUaLuO+0QSnB3NDEeScSetjNksU+Xp23lNta6Zgp3ux4DBV 9uGhVO7pze8uwEI0IzIwOjGOn7j+Y7fvCW0ODDEVocZCoqmrUvuSL0dtG4RT24BV zAMGuCWEmimmkMHNNWaI66KapB6cM/AHbqZaY2Wvysw52xgLAQwufiisZ86Zx7u4 8IMcvFw2DHojIuYPpFGn54cGjCI6EkQD+fQiGKKT5EMHKNStd26y7rrKO3nSbnoM JWAoqfK2uK+dvHaVqB8B6nH0BqeFxPe6TOW5aLrzJvFBBhz0Exw1alJcBmJq+3vR SSzUc6y8FmNsLYvi7fGAvCYqwCEIqpxjYs0s335Nd16oyyHQt0DPEE6x06sAMrU7 emCqwz09qBxGdwW7vnV7RKQe+9FxfCAoSBYRl3cW2lZHpB3eLpp9mVBFoTy+kvPV d5lj/vjSRhahj/fysA7fU3/QY1pRnlmWOAJ66sXZGbz2ZAokXW/oRGdgRyDFFdd9 TDeEsKWlcSNclo7TRH/lgfc+kF6jFiwmRpWECZgu1YKPT9hhbAW3c9w32KTE43QI eTma5j0MNZsBkYFBmfjpmipBjv2HYzXhnkQRB8c7Z1naZUiuL0M= =GXVf -----END PGP SIGNATURE----- Merge tag 'soc-arm-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC code updates from Arnd Bergmann: "The AMD Pensando DPU platform gets added to arm64, and some minor updates make it into Renesas' 32-bit platforms" * tag 'soc-arm-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm: debug: reuse the config DEBUG_OMAP2UART{1,2} for OMAP{3,4,5} arm64: Add config for AMD Pensando SoC platforms MAINTAINERS: Add entry for AMD PENSANDO ARM: shmobile: sh73a0: Reserve boot area when SMP is enabled ARM: shmobile: r8a7779: Reserve boot area when SMP is enabled ARM: shmobile: rcar-gen2: Reserve boot area when SMP is enabled ARM: shmobile: rcar-gen2: Remove unneeded once handling
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commit
4684e928db
@ -1826,6 +1826,13 @@ N: allwinner
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N: sun[x456789]i
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N: sun[25]0i
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ARM/AMD PENSANDO ARM64 ARCHITECTURE
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M: Brad Larson <blarson@amd.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Supported
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F: Documentation/devicetree/bindings/*/amd,pensando*
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F: arch/arm64/boot/dts/amd/elba*
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ARM/Amlogic Meson SoC CLOCK FRAMEWORK
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M: Neil Armstrong <neil.armstrong@linaro.org>
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M: Jerome Brunet <jbrunet@baylibre.com>
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@ -1593,10 +1593,8 @@ config DEBUG_UART_PHYS
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default 0x48020000 if DEBUG_OMAP4UART3 || DEBUG_TI81XXUART1
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default 0x48022000 if DEBUG_TI81XXUART2
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default 0x48024000 if DEBUG_TI81XXUART3
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default 0x4806a000 if DEBUG_OMAP2UART1 || DEBUG_OMAP3UART1 || \
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DEBUG_OMAP4UART1 || DEBUG_OMAP5UART1
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default 0x4806c000 if DEBUG_OMAP2UART2 || DEBUG_OMAP3UART2 || \
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DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2
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default 0x4806a000 if DEBUG_OMAP2UART1
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default 0x4806c000 if DEBUG_OMAP2UART2
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default 0x4806e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4
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default 0x49020000 if DEBUG_OMAP3UART3
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default 0x49042000 if DEBUG_OMAP3UART4
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@ -1719,10 +1717,8 @@ config DEBUG_UART_VIRT
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default 0xfa020000 if DEBUG_OMAP4UART3 || DEBUG_TI81XXUART1
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default 0xfa022000 if DEBUG_TI81XXUART2
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default 0xfa024000 if DEBUG_TI81XXUART3
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default 0xfa06a000 if DEBUG_OMAP2UART1 || DEBUG_OMAP3UART1 || \
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DEBUG_OMAP4UART1 || DEBUG_OMAP5UART1
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default 0xfa06c000 if DEBUG_OMAP2UART2 || DEBUG_OMAP3UART2 || \
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DEBUG_OMAP4UART2 || DEBUG_OMAP5UART2
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default 0xfa06a000 if DEBUG_OMAP2UART1
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default 0xfa06c000 if DEBUG_OMAP2UART2
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default 0xfa06e000 if DEBUG_OMAP2UART3 || DEBUG_OMAP4UART4
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default 0xfa71e000 if DEBUG_QCOM_UARTDM
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default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
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@ -46,15 +46,16 @@ void __init rcar_gen2_pm_init(void)
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{
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void __iomem *p;
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u32 bar;
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static int once;
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struct device_node *np;
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bool has_a7 = false;
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bool has_a15 = false;
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struct resource res;
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int error;
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if (once++)
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if (!request_mem_region(0, SZ_256K, "Boot Area")) {
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pr_err("Failed to request boot area\n");
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return;
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}
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for_each_of_cpu_node(np) {
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if (of_device_is_compatible(np, "arm,cortex-a15"))
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@ -38,7 +38,14 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
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static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *base = ioremap(HPBREG_BASE, 0x1000);
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void __iomem *base;
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if (!request_mem_region(0, SZ_4K, "Boot Area")) {
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pr_err("Failed to request boot area\n");
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return;
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}
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base = ioremap(HPBREG_BASE, 0x1000);
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/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
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writel(__pa(shmobile_boot_vector), base + AVECR);
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@ -44,10 +44,16 @@ static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
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static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *ap = ioremap(AP_BASE, PAGE_SIZE);
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void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE);
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void __iomem *ap, *sysc;
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if (!request_mem_region(0, SZ_4K, "Boot Area")) {
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pr_err("Failed to request boot area\n");
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return;
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}
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/* Map the reset vector (in headsmp.S) */
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ap = ioremap(AP_BASE, PAGE_SIZE);
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sysc = ioremap(SYSC_BASE, PAGE_SIZE);
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writel(0, ap + APARMBAREA); /* 4k */
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writel(__pa(shmobile_boot_vector), sysc + SBAR);
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iounmap(sysc);
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@ -244,6 +244,18 @@ config ARCH_NPCM
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General support for NPCM8xx BMC (Arbel).
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Nuvoton NPCM8xx BMC based on the Cortex A35.
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config ARCH_PENSANDO
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bool "AMD Pensando Platforms"
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help
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This enables support for the ARMv8 based AMD Pensando SoC
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family to include the Elba SoC.
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AMD Pensando SoCs support a range of Distributed Services
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Cards in PCIe format installed into servers. The Elba
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SoC includes 16 Cortex A-72 CPU cores, 144 P4-programmable
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cores for a minimal latency/jitter datapath, and network
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interfaces up to 200 Gb/s.
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config ARCH_QCOM
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bool "Qualcomm Platforms"
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select GPIOLIB
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